diff options
| author | Patrick Georgi <patrick.georgi@secunet.com> | 2011-01-14 07:41:42 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2011-01-14 07:41:42 +0000 |
| commit | ef3296542a1a1883e8a0f5a05992b2db5b507f2c (patch) | |
| tree | 9c3778c09f1458cd88386999ab53b2bfbb3c19f0 /src | |
| parent | a865b17eff05fa3936494716401f6aa9a9ef6358 (diff) | |
| download | coreboot-ef3296542a1a1883e8a0f5a05992b2db5b507f2c.tar.xz | |
Improved GPIO setup for roda/rk886ex, and some documentation
on what the GPIOs are used for.
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stepan@coreboot.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6254 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/roda/rk886ex/romstage.c | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c index 80afe80745..cf36c7cda7 100644 --- a/src/mainboard/roda/rk886ex/romstage.c +++ b/src/mainboard/roda/rk886ex/romstage.c @@ -43,14 +43,27 @@ void setup_ich7_gpios(void) /* General Registers */ outl(0xbfc0f7c0, DEFAULT_GPIOBASE + 0x00); /* GPIO_USE_SEL */ outl(0x70a87d83, DEFAULT_GPIOBASE + 0x04); /* GP_IO_SEL */ - outl(0x7dc07f83, DEFAULT_GPIOBASE + 0x0c); /* GP_LVL */ + // ------------------------------------------------------------ + // 0 - GPO6 - Enable power of SATA channel 0 + // 0 - GPO9 - Wireless LAN power on + // 0 - GPO15 - FAN on + // 1 - GPO22 - FWH WP + // 1 - GPO24 - GPS on + // 0 - GPO25 - External Antenna Mux on + // 0 - GPO26 - BT on + // 0 - GPO27 - GSM on + outl(0x01400000, DEFAULT_GPIOBASE + 0x0c); /* GP_LVL */ + // ------------------------------------------------------------ /* Output Control Registers */ outl(0x00000000, DEFAULT_GPIOBASE + 0x18); /* GPO_BLINK */ /* Input Control Registers */ outl(0x00002180, DEFAULT_GPIOBASE + 0x2c); /* GPI_INV */ outl(0x000100e8, DEFAULT_GPIOBASE + 0x30); /* GPIO_USE_SEL2 */ outl(0x00000030, DEFAULT_GPIOBASE + 0x34); /* GP_IO_SEL2 */ - outl(0x00010030, DEFAULT_GPIOBASE + 0x38); /* GP_LVL */ + // ------------------------------------------------------------ + // 1 - GPO48 - FWH TBL# + outl(0x00010000, DEFAULT_GPIOBASE + 0x38); /* GP_LVL */ + // ------------------------------------------------------------ } static void ich7_enable_lpc(void) |