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authorJett Rink <jettrink@chromium.org>2019-05-10 09:12:02 -0600
committerPatrick Georgi <pgeorgi@google.com>2019-05-13 09:16:43 +0000
commitf2d173a554b82b731fceeecd00095f6c6433c7ba (patch)
tree56e68b73d3ab63411ae2ff673ae1680b1440955d /src
parentac6bf7dc1259ae09dfbd123dc6dee1400b26c801 (diff)
downloadcoreboot-f2d173a554b82b731fceeecd00095f6c6433c7ba.tar.xz
mb/google/sarien: config ISH_GP6 with NF2
A12 is not current set for ISH_GP6 so the ISH_LID_CL#_TAB signal is not making it to the ISH properly. Enable the second native function instead of the first. BRANCH=none BUG=b:131785573 TEST=gpioget on ISH now shows the correct gpio level Change-Id: Ib3a654ae659037263aa9aa29d45b42ca67b7955b Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32738 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/sarien/variants/arcada/gpio.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/sarien/variants/arcada/gpio.c b/src/mainboard/google/sarien/variants/arcada/gpio.c
index da95497657..ea0601b55e 100644
--- a/src/mainboard/google/sarien/variants/arcada/gpio.c
+++ b/src/mainboard/google/sarien/variants/arcada/gpio.c
@@ -31,7 +31,7 @@ static const struct pad_config gpio_table[] = {
/* CLKOUT_LPC1 */ PAD_NC(GPP_A10, NONE),
/* PME# */ PAD_NC(GPP_A11, NONE),
/* ISH_LID_CL#_TAB */
-/* BM_BUSY# */ PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1),
+/* ISH_GP6 */ PAD_CFG_NF(GPP_A12, NONE, DEEP, NF2),
/* SUSWARN# */ PAD_NC(GPP_A13, NONE),
/* ESPI_RESET# */
/* SUSACK# */ PAD_NC(GPP_A15, NONE),