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authorIru Cai <mytbk920423@gmail.com>2019-11-17 20:00:54 +0800
committerIru Cai <mytbk920423@gmail.com>2019-11-17 20:02:05 +0800
commit0c32ce645c8ebb94883c65ae0e53a2e0dafd4a51 (patch)
treeafff47efe66815bf23acd1e2e39c35956fc805e0 /src
parent23367f7864b11ce17269fe5a01e7cfc74f73bbe2 (diff)
downloadcoreboot-0c32ce645c8ebb94883c65ae0e53a2e0dafd4a51.tar.xz
move out ref_fffcb80c
Diffstat (limited to 'src')
-rw-r--r--src/northbridge/intel/haswell/mrc.asm96
-rw-r--r--src/northbridge/intel/haswell/mrc_misc.c107
2 files changed, 102 insertions, 101 deletions
diff --git a/src/northbridge/intel/haswell/mrc.asm b/src/northbridge/intel/haswell/mrc.asm
index 7a3f0bb994..82aafa9ad7 100644
--- a/src/northbridge/intel/haswell/mrc.asm
+++ b/src/northbridge/intel/haswell/mrc.asm
@@ -224,7 +224,6 @@ extern frag_fffa58f7
extern wait_5030
extern wait_5084
global fcn_fffab1b6
-global ref_fffcb80c
;;
mrc_entry:
@@ -44739,101 +44738,6 @@ dd 0x08000400
dd 0x20001000
dd 0x80004000
-ref_fffcb80c:
-dd 0x003c0000
-dd 0x004c0048
-dd 0x0078005c
-dd 0x013c0100
-dd 0x014c0148
-dd 0x0178015c
-dd 0x023c0200
-dd 0x024c0248
-dd 0x0278025c
-dd 0x033c0300
-dd 0x034c0348
-dd 0x0378035c
-dd 0x043c0400
-dd 0x044c0448
-dd 0x0478045c
-dd 0x053c0500
-dd 0x054c0548
-dd 0x0578055c
-dd 0x063c0600
-dd 0x064c0648
-dd 0x0678065c
-dd 0x073c0700
-dd 0x074c0748
-dd 0x0778075c
-dd 0x083c0800
-dd 0x084c0848
-dd 0x0878085c
-dd 0x093c0900
-dd 0x094c0948
-dd 0x0978095c
-dd 0x0a3c0a00
-dd 0x0a4c0a48
-dd 0x0a780a5c
-dd 0x0b3c0b00
-dd 0x0b4c0b48
-dd 0x0b780b5c
-dd 0x0c3c0c00
-dd 0x0c4c0c48
-dd 0x0c780c5c
-dd 0x0d3c0d00
-dd 0x0d4c0d48
-dd 0x0d780d5c
-dd 0x0e3c0e00
-dd 0x0e4c0e48
-dd 0x0e780e5c
-dd 0x0f3c0f00
-dd 0x0f4c0f48
-dd 0x0f780f5c
-dd 0x103c1000
-dd 0x104c1048
-dd 0x1078105c
-dd 0x113c1100
-dd 0x114c1148
-dd 0x1178115c
-dd 0x12081204
-dd 0x121c1214
-dd 0x13081304
-dd 0x131c1314
-dd 0x140c1404
-dd 0x150c1504
-dd 0x18101808
-dd 0x19101908
-dd 0x1a0c1a04
-dd 0x1b0c1b04
-dd 0x1c1c1c14
-dd 0x1d1c1d14
-dd 0x20082000
-dd 0x3a1c3a14
-dd 0x3a243a24
-dd 0x40144000
-dd 0x40284024
-dd 0x40d040d0
-dd 0x42244220
-dd 0x42944294
-dd 0x42a0429c
-dd 0x42fc42ec
-dd 0x4390438c
-dd 0x43284328
-dd 0x44144400
-dd 0x44284424
-dd 0x44d044d0
-dd 0x46244620
-dd 0x46944694
-dd 0x46a0469c
-dd 0x46fc46ec
-dd 0x47284728
-dd 0x4790478c
-dd 0x58885884
-dd 0x589c5890
-dd 0x58a458a4
-dd 0x58e458d0
-dd 0x58805880
-dd 0x50dc5000
-
ref_fffcb980:
dd 0x00000000
dd 0x00000000
diff --git a/src/northbridge/intel/haswell/mrc_misc.c b/src/northbridge/intel/haswell/mrc_misc.c
index 8dafd0f179..dcb83576f9 100644
--- a/src/northbridge/intel/haswell/mrc_misc.c
+++ b/src/northbridge/intel/haswell/mrc_misc.c
@@ -1662,7 +1662,104 @@ int fcn_fffa7e78(void *ramdata)
return 0;
}
-extern uint16_t ref_fffcb80c[];
+static const struct {
+ uint16_t start;
+ uint16_t end;
+} ref_fffcb80c[93] = {
+ {0x0000, 0x003c},
+ {0x0048, 0x004c},
+ {0x005c, 0x0078},
+ {0x0100, 0x013c},
+ {0x0148, 0x014c},
+ {0x015c, 0x0178},
+ {0x0200, 0x023c},
+ {0x0248, 0x024c},
+ {0x025c, 0x0278},
+ {0x0300, 0x033c},
+ {0x0348, 0x034c},
+ {0x035c, 0x0378},
+ {0x0400, 0x043c},
+ {0x0448, 0x044c},
+ {0x045c, 0x0478},
+ {0x0500, 0x053c},
+ {0x0548, 0x054c},
+ {0x055c, 0x0578},
+ {0x0600, 0x063c},
+ {0x0648, 0x064c},
+ {0x065c, 0x0678},
+ {0x0700, 0x073c},
+ {0x0748, 0x074c},
+ {0x075c, 0x0778},
+ {0x0800, 0x083c},
+ {0x0848, 0x084c},
+ {0x085c, 0x0878},
+ {0x0900, 0x093c},
+ {0x0948, 0x094c},
+ {0x095c, 0x0978},
+ {0x0a00, 0x0a3c},
+ {0x0a48, 0x0a4c},
+ {0x0a5c, 0x0a78},
+ {0x0b00, 0x0b3c},
+ {0x0b48, 0x0b4c},
+ {0x0b5c, 0x0b78},
+ {0x0c00, 0x0c3c},
+ {0x0c48, 0x0c4c},
+ {0x0c5c, 0x0c78},
+ {0x0d00, 0x0d3c},
+ {0x0d48, 0x0d4c},
+ {0x0d5c, 0x0d78},
+ {0x0e00, 0x0e3c},
+ {0x0e48, 0x0e4c},
+ {0x0e5c, 0x0e78},
+ {0x0f00, 0x0f3c},
+ {0x0f48, 0x0f4c},
+ {0x0f5c, 0x0f78},
+ {0x1000, 0x103c},
+ {0x1048, 0x104c},
+ {0x105c, 0x1078},
+ {0x1100, 0x113c},
+ {0x1148, 0x114c},
+ {0x115c, 0x1178},
+ {0x1204, 0x1208},
+ {0x1214, 0x121c},
+ {0x1304, 0x1308},
+ {0x1314, 0x131c},
+ {0x1404, 0x140c},
+ {0x1504, 0x150c},
+ {0x1808, 0x1810},
+ {0x1908, 0x1910},
+ {0x1a04, 0x1a0c},
+ {0x1b04, 0x1b0c},
+ {0x1c14, 0x1c1c},
+ {0x1d14, 0x1d1c},
+ {0x2000, 0x2008},
+ {0x3a14, 0x3a1c},
+ {0x3a24, 0x3a24},
+ {0x4000, 0x4014},
+ {0x4024, 0x4028},
+ {0x40d0, 0x40d0},
+ {0x4220, 0x4224},
+ {0x4294, 0x4294},
+ {0x429c, 0x42a0},
+ {0x42ec, 0x42fc},
+ {0x438c, 0x4390},
+ {0x4328, 0x4328},
+ {0x4400, 0x4414},
+ {0x4424, 0x4428},
+ {0x44d0, 0x44d0},
+ {0x4620, 0x4624},
+ {0x4694, 0x4694},
+ {0x469c, 0x46a0},
+ {0x46ec, 0x46fc},
+ {0x4728, 0x4728},
+ {0x478c, 0x4790},
+ {0x5884, 0x5888},
+ {0x5890, 0x589c},
+ {0x58a4, 0x58a4},
+ {0x58d0, 0x58e4},
+ {0x5880, 0x5880},
+ {0x5000, 0x50dc},
+};
int fcn_fffa948c(void *ramdata)
{
@@ -1670,8 +1767,8 @@ int fcn_fffa948c(void *ramdata)
void *ptr = ramdata + 0x14;
for (int i = 0; i < 0x5d; i++) {
- uint32_t start = ref_fffcb80c[i * 2];
- uint32_t end = ref_fffcb80c[i * 2 + 1];
+ uint32_t start = ref_fffcb80c[i].start;
+ uint32_t end = ref_fffcb80c[i].end;
while (start <= end) {
MCHBAR32(start) = *(uint32_t*)(ptr);
@@ -1712,8 +1809,8 @@ int fcn_fffab280(void *ramdata)
void *saved_reg = ramdata + 0x14;
for (int i = 0; i < 0x5d; i++) {
- uint32_t start = ref_fffcb80c[i * 2];
- uint32_t end = ref_fffcb80c[i * 2 + 1];
+ uint32_t start = ref_fffcb80c[i].start;
+ uint32_t end = ref_fffcb80c[i].end;
while (start <= end) {
*(uint32_t*)(saved_reg) = MCHBAR32(start);
start += 4;