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author | Iru Cai <mytbk920423@gmail.com> | 2019-11-17 17:56:33 +0800 |
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committer | Iru Cai <mytbk920423@gmail.com> | 2019-11-17 17:56:33 +0800 |
commit | 2a69a9132b2c2f1e4ab875890732cf94217c2853 (patch) | |
tree | 9291400092b6819e82c4ccff623928e6786fd7a1 /src | |
parent | 1069211fdc5caab44adfc54b07e8e33508d4d51f (diff) | |
download | coreboot-2a69a9132b2c2f1e4ab875890732cf94217c2853.tar.xz |
print what function is called
Diffstat (limited to 'src')
-rw-r--r-- | src/northbridge/intel/haswell/mrc_frag_init_memory.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/northbridge/intel/haswell/mrc_frag_init_memory.c b/src/northbridge/intel/haswell/mrc_frag_init_memory.c index 21e9b48ecb..cb4dcea74d 100644 --- a/src/northbridge/intel/haswell/mrc_frag_init_memory.c +++ b/src/northbridge/intel/haswell/mrc_frag_init_memory.c @@ -314,6 +314,7 @@ loc_fffc210d: continue; } } + printk(BIOS_DEBUG, "calling memory init function %d.\n", i); mrc_get_timestamp(); ret = ref_fffcbf28[i].func(ram_data); mrc_get_timestamp(); |