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authorSubrata Banik <subrata.banik@intel.com>2017-12-07 15:12:42 +0530
committerSubrata Banik <subrata.banik@intel.com>2017-12-13 10:20:37 +0000
commit5c619a285cd47ffafcb28872d52495b0eef2ea77 (patch)
tree550702915e7a4ad8b551a6974ac853e586f3545c /src
parent6bbc91a96468b97a3e19cdba4641d68e2f2a6f98 (diff)
downloadcoreboot-5c619a285cd47ffafcb28872d52495b0eef2ea77.tar.xz
soc/intel/skylake: Remove set_subsystem() from SoC
Intel common PCI driver is handle PCI subsystem ID programming, hence no need to have an explicit soc function to do the same. TEST=PCI subsystem id is getting programming during pci enumeration. Change-Id: Iead57a286b26d532e578cfff99f412c23fd4c2fe Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/22769 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/skylake/chip.c15
-rw-r--r--src/soc/intel/skylake/chip_fsp20.c4
-rw-r--r--src/soc/intel/skylake/include/fsp11/soc/ramstage.h1
-rw-r--r--src/soc/intel/skylake/include/fsp20/soc/ramstage.h2
4 files changed, 0 insertions, 22 deletions
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index 4909ea4ccb..8002270ed9 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -824,18 +824,3 @@ void soc_display_silicon_init_params(const SILICON_INIT_UPD *original,
original->FastPkgCRampDisable,
params->FastPkgCRampDisable);
}
-
-static void pci_set_subsystem(device_t dev, unsigned int vendor,
- unsigned int device)
-{
- if (!vendor || !device)
- pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
- pci_read_config32(dev, PCI_VENDOR_ID));
- else
- pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
- (device << 16) | vendor);
-}
-
-struct pci_operations soc_pci_ops = {
- .set_subsystem = &pci_set_subsystem
-};
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
index 8e5cc2a627..f4060b2d99 100644
--- a/src/soc/intel/skylake/chip_fsp20.c
+++ b/src/soc/intel/skylake/chip_fsp20.c
@@ -293,10 +293,6 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
soc_irq_settings(params);
}
-struct pci_operations soc_pci_ops = {
- .set_subsystem = &pci_dev_set_subsystem
-};
-
/* Mainboard GPIO Configuration */
__attribute__((weak)) void mainboard_silicon_init_params(FSP_S_CONFIG *params)
{
diff --git a/src/soc/intel/skylake/include/fsp11/soc/ramstage.h b/src/soc/intel/skylake/include/fsp11/soc/ramstage.h
index 1dba445a20..3ab0efa7e5 100644
--- a/src/soc/intel/skylake/include/fsp11/soc/ramstage.h
+++ b/src/soc/intel/skylake/include/fsp11/soc/ramstage.h
@@ -29,7 +29,6 @@ void soc_irq_settings(FSP_SIL_UPD *params);
void soc_init_pre_device(void *chip_info);
void soc_fsp_load(void);
const char *soc_acpi_name(const struct device *dev);
-extern struct pci_operations soc_pci_ops;
/* Get igd framebuffer bar */
uintptr_t fsp_soc_get_igd_bar(void);
diff --git a/src/soc/intel/skylake/include/fsp20/soc/ramstage.h b/src/soc/intel/skylake/include/fsp20/soc/ramstage.h
index 69439149b3..23443c33d3 100644
--- a/src/soc/intel/skylake/include/fsp20/soc/ramstage.h
+++ b/src/soc/intel/skylake/include/fsp20/soc/ramstage.h
@@ -32,6 +32,4 @@ void soc_init_pre_device(void *chip_info);
void soc_irq_settings(FSP_SIL_UPD *params);
const char *soc_acpi_name(const struct device *dev);
-extern struct pci_operations soc_pci_ops;
-
#endif