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author | Patrick Georgi <patrick@georgi-clan.de> | 2012-02-16 19:58:51 +0100 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-02-17 22:41:40 +0100 |
commit | 62246f7121d010db7e1fd0cf0fa73de5132cafe9 (patch) | |
tree | 83e3d771e97905fbb855017acb92ba6db9b0b4d5 /src | |
parent | 024d8d9c221040c1c91b2f503818bc696f279fbd (diff) | |
download | coreboot-62246f7121d010db7e1fd0cf0fa73de5132cafe9.tar.xz |
intel/sch: Move HAVE_HARD_RESET to southbridge
No in-tree board using that chipset has it not selected, so move
selection from boards to southbridge.
Change-Id: I521deecf58e5d5de303f1ef2f5ff7e965294de18
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/665
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/iwave/iWRainbowG6/Kconfig | 1 | ||||
-rw-r--r-- | src/southbridge/intel/sch/Kconfig | 1 |
2 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/iwave/iWRainbowG6/Kconfig b/src/mainboard/iwave/iWRainbowG6/Kconfig index a1c03c8050..6802d5c40d 100644 --- a/src/mainboard/iwave/iWRainbowG6/Kconfig +++ b/src/mainboard/iwave/iWRainbowG6/Kconfig @@ -18,7 +18,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_1024 select USE_DCACHE_RAM select GFXUMA - select HAVE_HARD_RESET config MAINBOARD_DIR string diff --git a/src/southbridge/intel/sch/Kconfig b/src/southbridge/intel/sch/Kconfig index ed2c6c4b03..83ff447f3e 100644 --- a/src/southbridge/intel/sch/Kconfig +++ b/src/southbridge/intel/sch/Kconfig @@ -20,6 +20,7 @@ config SOUTHBRIDGE_INTEL_SCH bool select HAVE_USBDEBUG + select HAVE_HARD_RESET if SOUTHBRIDGE_INTEL_SCH |