diff options
author | Shawn Nematbakhsh <shawnn@chromium.org> | 2013-12-20 13:27:56 -0800 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-05-12 22:11:37 +0200 |
commit | 6a70258c696090bb10d65f2a57b91348c7382477 (patch) | |
tree | c359c36c31bae7778216f2531553d62411d3f5af /src | |
parent | 003931975f975145e25c0987aaa87344a30cb6af (diff) | |
download | coreboot-6a70258c696090bb10d65f2a57b91348c7382477.tar.xz |
rambi: Make eMMC CLK pull-down and change pull strengths to 20K
eMMC CLK was incorrectly configured as PULL_UP, but should have been
PULL_DOWN. 2K pulls somehow masked this problem.
BUG=chrome-os-partner:24353
TEST=Verify eMMC is bootable on Rambi on boards that previously failed
with an all-20K, all-PU eMMC pin configuration.
BRANCH=None
Change-Id: I0cbb6ebbb6818f83402b99330728266b09a0f5d6
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/181034
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/5026
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/google/rambi/gpio.c | 23 |
1 files changed, 11 insertions, 12 deletions
diff --git a/src/mainboard/google/rambi/gpio.c b/src/mainboard/google/rambi/gpio.c index 6e6efe6f11..bbccaa9c09 100644 --- a/src/mainboard/google/rambi/gpio.c +++ b/src/mainboard/google/rambi/gpio.c @@ -72,18 +72,17 @@ static const struct soc_gpio_map gpscore_gpio_map[] = { GPIO_NC, /* S0-SC013 - NC */ GPIO_INPUT, /* S0-SC014 - DET_TRIGGER - INT */ GPIO_INPUT, /* S0-SC015 - AJACK_MICPRES_L - INT */ - /* TODO(shawnn): Investigate if these PUs can be weakened. */ - GPIO_FUNC(3, PULL_UP, 2K), /* S0-SC016 - MMC1_45_CLK */ - GPIO_FUNC(3, PULL_UP, 2K), /* S0-SC017 - MMC1_45_D[0] */ - GPIO_FUNC(3, PULL_UP, 2K), /* S0-SC018 - MMC1_45_D[1] */ - GPIO_FUNC(3, PULL_UP, 2K), /* S0-SC019 - MMC1_45_D[2] */ - GPIO_FUNC(3, PULL_UP, 2K), /* S0-SC020 - MMC1_45_D[3] */ - GPIO_FUNC(3, PULL_UP, 2K), /* S0-SC021 - MMC1_45_D[4] */ - GPIO_FUNC(3, PULL_UP, 2K), /* S0-SC022 - MMC1_45_D[5] */ - GPIO_FUNC(3, PULL_UP, 2K), /* S0-SC023 - MMC1_45_D[6] */ - GPIO_FUNC(3, PULL_UP, 2K), /* S0-SC024 - MMC1_45_D[7] */ - GPIO_FUNC(3, PULL_UP, 2K), /* S0-SC025 - MMC1_45_CMD */ - GPIO_FUNC(3, PULL_UP, 2K), /* S0-SC026 - MMC1_45_RST */ + GPIO_FUNC(3, PULL_DOWN, 20K), /* S0-SC016 - MMC1_45_CLK */ + GPIO_FUNC(3, PULL_UP, 20K), /* S0-SC017 - MMC1_45_D[0] */ + GPIO_FUNC(3, PULL_UP, 20K), /* S0-SC018 - MMC1_45_D[1] */ + GPIO_FUNC(3, PULL_UP, 20K), /* S0-SC019 - MMC1_45_D[2] */ + GPIO_FUNC(3, PULL_UP, 20K), /* S0-SC020 - MMC1_45_D[3] */ + GPIO_FUNC(3, PULL_UP, 20K), /* S0-SC021 - MMC1_45_D[4] */ + GPIO_FUNC(3, PULL_UP, 20K), /* S0-SC022 - MMC1_45_D[5] */ + GPIO_FUNC(3, PULL_UP, 20K), /* S0-SC023 - MMC1_45_D[6] */ + GPIO_FUNC(3, PULL_UP, 20K), /* S0-SC024 - MMC1_45_D[7] */ + GPIO_FUNC(3, PULL_UP, 20K), /* S0-SC025 - MMC1_45_CMD */ + GPIO_FUNC(3, PULL_UP, 20K), /* S0-SC026 - MMC1_45_RST */ GPIO_NC, /* S0-SC027 - NC */ GPIO_NC, /* S0-SC028 - NC */ GPIO_NC, /* S0-SC029 - NC */ |