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| author | Jonathan Neuschäfer <j.neuschaefer@gmx.net> | 2018-04-08 15:05:08 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-04-26 11:50:20 +0000 |
| commit | 93c9130a67c1e3d76d0c4fa2e6c9e2a2ee51a2f0 (patch) | |
| tree | cfecd0a6c3f26bf1ff82835e1248cb0488becae0 /src | |
| parent | 225b03534c81e2beb696f51175f14fd352f3090b (diff) | |
| download | coreboot-93c9130a67c1e3d76d0c4fa2e6c9e2a2ee51a2f0.tar.xz | |
arch/riscv: Store mprv bit in size_t
CSRs are XLEN bits wide (i.e. the same width as general purpose
registers), so size_t seems a little more correct than int.
This change doesn't affect functionality because MSTATUS_MPRV already
fits in 31 bits.
Change-Id: I003c1b88b4493681dc9b6178ac785be330203ef5
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/25625
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/riscv/include/vm.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/riscv/include/vm.h b/src/arch/riscv/include/vm.h index fd0a2c947c..a30d6bbdd5 100644 --- a/src/arch/riscv/include/vm.h +++ b/src/arch/riscv/include/vm.h @@ -42,7 +42,7 @@ void mstatus_init(void); // need to setup mstatus so we know we have virtual mem static inline type name(type *p); \ static inline type name(type *p) \ { \ - int mprv = MSTATUS_MPRV; \ + size_t mprv = MSTATUS_MPRV; \ type value; \ asm ( \ "csrs mstatus, %1\n" \ @@ -57,7 +57,7 @@ void mstatus_init(void); // need to setup mstatus so we know we have virtual mem static inline void name(type *p, type value); \ static inline void name(type *p, type value) \ { \ - int mprv = MSTATUS_MPRV; \ + size_t mprv = MSTATUS_MPRV; \ asm ( \ "csrs mstatus, %0\n" \ STRINGIFY(insn) " %1, 0(%2)\n" \ |