diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-18 08:30:30 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-19 19:48:07 +0000 |
| commit | a7cac0a6818254b9cdad9cd62c2f2a0e3eebe79d (patch) | |
| tree | c66c1bc77e9f185fd832cd0405f5fd428b30033d /src | |
| parent | 2dba2949fa32d71e38042b349eaafa0780e807bd (diff) | |
| download | coreboot-a7cac0a6818254b9cdad9cd62c2f2a0e3eebe79d.tar.xz | |
emulation/qemu-x86: Fix romstage stack alignment
Also tidy up some register usage.
Change-Id: I5b4b4a29c854f4ca165cede4e9b6755a6c577e76
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34975
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/cpu/qemu-x86/cache_as_ram_bootblock.S | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/src/cpu/qemu-x86/cache_as_ram_bootblock.S b/src/cpu/qemu-x86/cache_as_ram_bootblock.S index 8e78aaaf96..f8dab1a728 100644 --- a/src/cpu/qemu-x86/cache_as_ram_bootblock.S +++ b/src/cpu/qemu-x86/cache_as_ram_bootblock.S @@ -28,22 +28,22 @@ cache_as_ram: * initialization. */ - post_code(0x21) - - movl $_car_stack_end, %esp - /* Align the stack and keep aligned for call to bootblock_c_entry() */ - and $0xfffffff0, %esp - sub $12, %esp - /* Clear the cache memory region. This will also clear CAR GLOBAL */ - movl $_car_region_start, %esi - movl %esi, %edi + movl $_car_region_start, %edi movl $_car_region_end, %ecx - sub $_car_region_start, %ecx + sub %edi, %ecx shr $2, %ecx xorl %eax, %eax rep stosl + post_code(0x21) + + movl $_car_stack_end, %esp + + /* Align the stack and keep aligned for call to bootblock_c_entry() */ + and $0xfffffff0, %esp + sub $4, %esp + /* Restore the BIST result and timestamps. */ movd %mm0, %ebx movd %mm1, %eax |