wrap mrc_get_bootmode, mrc_locateppi

so that it's more friendly for decompilers

3 files changed, 28 insertions, 9 deletions

diff --git a/src/northbridge/intel/haswell/Makefile.inc b/src/northbridge/intel/haswell/Makefile.inc
index 4692a0c508..d90c1945e2 100644
--- a/src/northbridge/intel/haswell/Makefile.inc
+++ b/src/northbridge/intel/haswell/Makefile.inc
@@ -59,6 +59,7 @@ romstage-y += pei_smbus.c
 romstage-y += mrc_frags.c
 romstage-y += pei_usb.c
 romstage-y += me_uma.c
+romstage-y += mrc_init_memory_fcns.c
 postcar-y += memmap.c
 
 endif
diff --git a/src/northbridge/intel/haswell/mrc_init_memory.asm b/src/northbridge/intel/haswell/mrc_init_memory.asm
index f8476a6211..bb5bfec2f8 100644
--- a/src/northbridge/intel/haswell/mrc_init_memory.asm
+++ b/src/northbridge/intel/haswell/mrc_init_memory.asm
@@ -82,6 +82,8 @@ extern frag_fffc2026
 global ref_fffcbf28
 extern memcpy
 extern dummy_func
+extern mrc_get_bootmode
+extern mrc_locateppi
 
 initialize_txt:
 push ebx
@@ -115,14 +117,15 @@ mov edx, ref_fffcbee8
 mov dword [ebp - 0x38ce], eax
 call mrc_memcpy
 mov edx, dword [ebp - 0x50bc]
+
 push edi
 push edi
-mov eax, dword [edx]
 lea edx, [ebp - 0x509c] ; stores boot mode
 push edx
 push dword [ebp - 0x50bc]
-call dword [eax + 0x28] ; GetBootMode
+call mrc_get_bootmode
 add esp, 0x10
+
 cmp dword [ebp - 0x509c], 0x11
 je short loc_fffc1bfd
 call create_raminit_hob
@@ -133,33 +136,32 @@ loc_fffc1bfd: ; boot mode is 3
 mov dword [ebp - 0x50a0], 0
 
 loc_fffc1c07:
-mov edx, dword [ebp - 0x50bc]
 sub esp, 0xc
 mov esi, 1
 xor edi, edi
-mov eax, dword [edx]
 lea edx, [ebp - 0x50a4]
 push edx
 push 0
 push 0
 push ref_fffcd4e4
 push dword [ebp - 0x50bc]
-call dword [eax + 0x20] ; LocatePpi
+call mrc_locateppi
 add esp, 0x20
+
 lea eax, [ebp - 0x503a]
 mov edx, 0xdd00
 call rtc_wait
+
 mov ecx, dword [ebp - 0x50bc]
 sub esp, 0xc
 lea edx, [ebp - 0x50a8]
 mov byte [ebp - 0x50aa], 0
-mov eax, dword [ecx]
 push edx
 push 0
 push 0
 push gEfiPeiReadOnlyVariablePpiGuid
 push ecx
-call dword [eax + 0x20] ; LocatePpi
+call mrc_locateppi
 add esp, 0x20
 
 call frag_fffc1c07
@@ -191,13 +193,12 @@ loc_fffc1dc2:
 mov ecx, dword [ebp - 0x50bc]
 sub esp, 0xc
 lea edx, [ebp - 0x5098]
-mov eax, dword [ecx]
 push edx
 push 0
 push 0
 push gPchMeUmaPpiGuid
 push ecx
-call dword [eax + 0x20] ; LocatePpi
+call mrc_locateppi
 mov eax, dword [ebp - 0x50c4]
 add esp, 0x20
 dec eax
diff --git a/src/northbridge/intel/haswell/mrc_init_memory_fcns.c b/src/northbridge/intel/haswell/mrc_init_memory_fcns.c
new file mode 100644
index 0000000000..665a4fe159
--- /dev/null
+++ b/src/northbridge/intel/haswell/mrc_init_memory_fcns.c
@@ -0,0 +1,17 @@
+#include "mrc_pei.h"
+
+void mrc_get_bootmode(const EFI_PEI_SERVICES **pps, int *bootmode);
+void mrc_get_bootmode(const EFI_PEI_SERVICES **pps, int *bootmode)
+{
+	(*pps)->GetBootMode(pps, bootmode);
+}
+
+int mrc_locateppi(const EFI_PEI_SERVICES **pps,
+		const EFI_GUID *Guid, unsigned long instance,
+		EFI_PEI_PPI_DESCRIPTOR  **PpiDescriptor, void *ppi);
+int mrc_locateppi(const EFI_PEI_SERVICES **pps,
+		const EFI_GUID *Guid, unsigned long instance,
+		EFI_PEI_PPI_DESCRIPTOR  **PpiDescriptor, void *ppi)
+{
+	return (*pps)->LocatePpi(pps, Guid, instance, PpiDescriptor, ppi);
+}