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authorStefan Reinauer <stepan@openbios.org>2004-03-24 12:28:18 +0000
committerStefan Reinauer <stepan@openbios.org>2004-03-24 12:28:18 +0000
commitb01fb94995a5d1fcd28bcbe7e6e509d69954c7c8 (patch)
treedece08e9054aea2362417a439c601f453d0d7a8b /src
parente52666931a3e34895b3f3b92641de9774ab722ec (diff)
downloadcoreboot-b01fb94995a5d1fcd28bcbe7e6e509d69954c7c8.tar.xz
small step to clean up mainboard directories. debug.c was basically identical
on all amd64 motherboards, so it moved to the amdk8 specific code. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1470 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/Iwill/DK8S2/auto.c2
-rw-r--r--src/mainboard/Iwill/DK8X/auto.c2
-rw-r--r--src/mainboard/amd/quartet/auto.c2
-rw-r--r--src/mainboard/amd/solo/auto.c2
-rw-r--r--src/mainboard/arima/hdama/auto.c2
-rw-r--r--src/mainboard/ibm/e325/auto.c2
-rw-r--r--src/mainboard/newisys/khepri/auto.c2
-rw-r--r--src/mainboard/tyan/s2850/auto.c2
-rw-r--r--src/mainboard/tyan/s2880/auto.c2
-rw-r--r--src/mainboard/tyan/s2881/auto.c2
-rw-r--r--src/mainboard/tyan/s2882/auto.c2
-rw-r--r--src/mainboard/tyan/s2885/auto.c2
-rw-r--r--src/mainboard/tyan/s4880/auto.c2
-rw-r--r--src/northbridge/amd/amdk8/debug.c161
14 files changed, 174 insertions, 13 deletions
diff --git a/src/mainboard/Iwill/DK8S2/auto.c b/src/mainboard/Iwill/DK8S2/auto.c
index 689346e6f2..5872c81065 100644
--- a/src/mainboard/Iwill/DK8S2/auto.c
+++ b/src/mainboard/Iwill/DK8S2/auto.c
@@ -15,7 +15,7 @@
#include "lib/delay.c"
#include "cpu/p6/boot_cpu.c"
#include "northbridge/amd/amdk8/reset_test.c"
-#include "debug.c"
+#include "northbridge/amd/amdk8/debug.c"
#include "northbridge/amd/amdk8/cpu_rev.c"
#define SIO_BASE 0x2e
diff --git a/src/mainboard/Iwill/DK8X/auto.c b/src/mainboard/Iwill/DK8X/auto.c
index 689346e6f2..5872c81065 100644
--- a/src/mainboard/Iwill/DK8X/auto.c
+++ b/src/mainboard/Iwill/DK8X/auto.c
@@ -15,7 +15,7 @@
#include "lib/delay.c"
#include "cpu/p6/boot_cpu.c"
#include "northbridge/amd/amdk8/reset_test.c"
-#include "debug.c"
+#include "northbridge/amd/amdk8/debug.c"
#include "northbridge/amd/amdk8/cpu_rev.c"
#define SIO_BASE 0x2e
diff --git a/src/mainboard/amd/quartet/auto.c b/src/mainboard/amd/quartet/auto.c
index 35cade92dc..121966dbc4 100644
--- a/src/mainboard/amd/quartet/auto.c
+++ b/src/mainboard/amd/quartet/auto.c
@@ -20,7 +20,7 @@
#include "lib/delay.c"
#include "cpu/p6/boot_cpu.c"
#include "northbridge/amd/amdk8/reset_test.c"
-#include "debug.c"
+#include "northbridge/amd/amdk8/debug.c"
#include "northbridge/amd/amdk8/cpu_rev.c"
#include "superio/NSC/pc87360/pc87360_early_serial.c"
diff --git a/src/mainboard/amd/solo/auto.c b/src/mainboard/amd/solo/auto.c
index 448aca113f..c48c4b7909 100644
--- a/src/mainboard/amd/solo/auto.c
+++ b/src/mainboard/amd/solo/auto.c
@@ -17,7 +17,7 @@
#include "lib/delay.c"
#include "cpu/p6/boot_cpu.c"
#include "northbridge/amd/amdk8/reset_test.c"
-#include "debug.c"
+#include "northbridge/amd/amdk8/debug.c"
#include "northbridge/amd/amdk8/cpu_rev.c"
#include "superio/NSC/pc87360/pc87360_early_serial.c"
diff --git a/src/mainboard/arima/hdama/auto.c b/src/mainboard/arima/hdama/auto.c
index e011809f49..d7b1210f13 100644
--- a/src/mainboard/arima/hdama/auto.c
+++ b/src/mainboard/arima/hdama/auto.c
@@ -17,7 +17,7 @@
#include "lib/delay.c"
#include "cpu/p6/boot_cpu.c"
#include "northbridge/amd/amdk8/reset_test.c"
-#include "debug.c"
+#include "northbridge/amd/amdk8/debug.c"
#include "northbridge/amd/amdk8/cpu_rev.c"
#include "superio/NSC/pc87360/pc87360_early_serial.c"
diff --git a/src/mainboard/ibm/e325/auto.c b/src/mainboard/ibm/e325/auto.c
index 8f9a12a5cc..0767aa6d47 100644
--- a/src/mainboard/ibm/e325/auto.c
+++ b/src/mainboard/ibm/e325/auto.c
@@ -19,7 +19,7 @@
#include "lib/delay.c"
#include "cpu/p6/boot_cpu.c"
#include "northbridge/amd/amdk8/reset_test.c"
-#include "debug.c"
+#include "northbridge/amd/amdk8/debug.c"
#include "northbridge/amd/amdk8/cpu_rev.c"
#include "superio/NSC/pc87366/pc87366_early_serial.c"
diff --git a/src/mainboard/newisys/khepri/auto.c b/src/mainboard/newisys/khepri/auto.c
index 8b7a85d6de..18e222f01f 100644
--- a/src/mainboard/newisys/khepri/auto.c
+++ b/src/mainboard/newisys/khepri/auto.c
@@ -20,7 +20,7 @@
#include "lib/delay.c"
#include "cpu/p6/boot_cpu.c"
#include "northbridge/amd/amdk8/reset_test.c"
-#include "debug.c"
+#include "northbridge/amd/amdk8/debug.c"
#include "northbridge/amd/amdk8/cpu_rev.c"
#include "superio/NSC/pc87360/pc87360_early_serial.c"
diff --git a/src/mainboard/tyan/s2850/auto.c b/src/mainboard/tyan/s2850/auto.c
index d7ed13235e..84d9f21a39 100644
--- a/src/mainboard/tyan/s2850/auto.c
+++ b/src/mainboard/tyan/s2850/auto.c
@@ -14,7 +14,7 @@
#include "lib/delay.c"
#include "cpu/p6/boot_cpu.c"
#include "northbridge/amd/amdk8/reset_test.c"
-#include "debug.c"
+#include "northbridge/amd/amdk8/debug.c"
#include "northbridge/amd/amdk8/cpu_rev.c"
diff --git a/src/mainboard/tyan/s2880/auto.c b/src/mainboard/tyan/s2880/auto.c
index c1d9d7e574..9b3252a890 100644
--- a/src/mainboard/tyan/s2880/auto.c
+++ b/src/mainboard/tyan/s2880/auto.c
@@ -18,7 +18,7 @@
#include "lib/delay.c"
#include "cpu/p6/boot_cpu.c"
#include "northbridge/amd/amdk8/reset_test.c"
-#include "debug.c"
+#include "northbridge/amd/amdk8/debug.c"
#include "northbridge/amd/amdk8/cpu_rev.c"
#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
diff --git a/src/mainboard/tyan/s2881/auto.c b/src/mainboard/tyan/s2881/auto.c
index 1e0bdf2182..5f5069cc97 100644
--- a/src/mainboard/tyan/s2881/auto.c
+++ b/src/mainboard/tyan/s2881/auto.c
@@ -17,7 +17,7 @@
#include "lib/delay.c"
#include "cpu/p6/boot_cpu.c"
#include "northbridge/amd/amdk8/reset_test.c"
-#include "debug.c"
+#include "northbridge/amd/amdk8/debug.c"
#include "northbridge/amd/amdk8/cpu_rev.c"
#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
diff --git a/src/mainboard/tyan/s2882/auto.c b/src/mainboard/tyan/s2882/auto.c
index 8989c3f79f..26d51e008c 100644
--- a/src/mainboard/tyan/s2882/auto.c
+++ b/src/mainboard/tyan/s2882/auto.c
@@ -17,7 +17,7 @@
#include "lib/delay.c"
#include "cpu/p6/boot_cpu.c"
#include "northbridge/amd/amdk8/reset_test.c"
-#include "debug.c"
+#include "northbridge/amd/amdk8/debug.c"
#include "northbridge/amd/amdk8/cpu_rev.c"
#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
diff --git a/src/mainboard/tyan/s2885/auto.c b/src/mainboard/tyan/s2885/auto.c
index f4169b3fa7..135418bdcb 100644
--- a/src/mainboard/tyan/s2885/auto.c
+++ b/src/mainboard/tyan/s2885/auto.c
@@ -18,7 +18,7 @@
#include "lib/delay.c"
#include "cpu/p6/boot_cpu.c"
#include "northbridge/amd/amdk8/reset_test.c"
-#include "debug.c"
+#include "northbridge/amd/amdk8/debug.c"
#include "northbridge/amd/amdk8/cpu_rev.c"
#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
diff --git a/src/mainboard/tyan/s4880/auto.c b/src/mainboard/tyan/s4880/auto.c
index 11e6a8b669..031020323a 100644
--- a/src/mainboard/tyan/s4880/auto.c
+++ b/src/mainboard/tyan/s4880/auto.c
@@ -17,7 +17,7 @@
#include "lib/delay.c"
#include "cpu/p6/boot_cpu.c"
#include "northbridge/amd/amdk8/reset_test.c"
-#include "debug.c"
+#include "northbridge/amd/amdk8/debug.c"
#include "northbridge/amd/amdk8/cpu_rev.c"
#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
diff --git a/src/northbridge/amd/amdk8/debug.c b/src/northbridge/amd/amdk8/debug.c
new file mode 100644
index 0000000000..40296ee3c8
--- /dev/null
+++ b/src/northbridge/amd/amdk8/debug.c
@@ -0,0 +1,161 @@
+/*
+ * generic K8 debug code, used by mainboard specific auto.c
+ *
+ */
+
+static void print_debug_pci_dev(unsigned dev)
+{
+ print_debug("PCI: ");
+ print_debug_hex8((dev >> 16) & 0xff);
+ print_debug_char(':');
+ print_debug_hex8((dev >> 11) & 0x1f);
+ print_debug_char('.');
+ print_debug_hex8((dev >> 8) & 7);
+}
+
+static void print_pci_devices(void)
+{
+ device_t dev;
+ for(dev = PCI_DEV(0, 0, 0);
+ dev <= PCI_DEV(0, 0x1f, 0x7);
+ dev += PCI_DEV(0,0,1)) {
+ uint32_t id;
+ id = pci_read_config32(dev, PCI_VENDOR_ID);
+ if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
+ (((id >> 16) & 0xffff) == 0xffff) ||
+ (((id >> 16) & 0xffff) == 0x0000)) {
+ continue;
+ }
+ print_debug_pci_dev(dev);
+ print_debug("\r\n");
+ }
+}
+
+static void dump_pci_device(unsigned dev)
+{
+ int i;
+ print_debug_pci_dev(dev);
+ print_debug("\r\n");
+
+ for(i = 0; i <= 255; i++) {
+ unsigned char val;
+ if ((i & 0x0f) == 0) {
+ print_debug_hex8(i);
+ print_debug_char(':');
+ }
+ val = pci_read_config8(dev, i);
+ print_debug_char(' ');
+ print_debug_hex8(val);
+ if ((i & 0x0f) == 0x0f) {
+ print_debug("\r\n");
+ }
+ }
+}
+
+static void dump_pci_devices(void)
+{
+ device_t dev;
+ for(dev = PCI_DEV(0, 0, 0);
+ dev <= PCI_DEV(0, 0x1f, 0x7);
+ dev += PCI_DEV(0,0,1)) {
+ uint32_t id;
+ id = pci_read_config32(dev, PCI_VENDOR_ID);
+ if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
+ (((id >> 16) & 0xffff) == 0xffff) ||
+ (((id >> 16) & 0xffff) == 0x0000)) {
+ continue;
+ }
+ dump_pci_device(dev);
+ }
+}
+
+static void dump_spd_registers(const struct mem_controller *ctrl)
+{
+ int i;
+ print_debug("\r\n");
+ for(i = 0; i < 4; i++) {
+ unsigned device;
+ device = ctrl->channel0[i];
+ if (device) {
+ int j;
+ print_debug("dimm: ");
+ print_debug_hex8(i);
+ print_debug(".0: ");
+ print_debug_hex8(device);
+ for(j = 0; j < 256; j++) {
+ int status;
+ unsigned char byte;
+ if ((j & 0xf) == 0) {
+ print_debug("\r\n");
+ print_debug_hex8(j);
+ print_debug(": ");
+ }
+ status = smbus_read_byte(device, j);
+ if (status < 0) {
+ print_debug("bad device\r\n");
+ break;
+ }
+ byte = status & 0xff;
+ print_debug_hex8(byte);
+ print_debug_char(' ');
+ }
+ print_debug("\r\n");
+ }
+ device = ctrl->channel1[i];
+ if (device) {
+ int j;
+ print_debug("dimm: ");
+ print_debug_hex8(i);
+ print_debug(".1: ");
+ print_debug_hex8(device);
+ for(j = 0; j < 256; j++) {
+ int status;
+ unsigned char byte;
+ if ((j & 0xf) == 0) {
+ print_debug("\r\n");
+ print_debug_hex8(j);
+ print_debug(": ");
+ }
+ status = smbus_read_byte(device, j);
+ if (status < 0) {
+ print_debug("bad device\r\n");
+ break;
+ }
+ byte = status & 0xff;
+ print_debug_hex8(byte);
+ print_debug_char(' ');
+ }
+ print_debug("\r\n");
+ }
+ }
+}
+static void dump_smbus_registers(void)
+{
+ int i;
+ print_debug("\r\n");
+ for(i = 1; i < 0x80; i++) {
+ unsigned device;
+ device = i;
+ int j;
+ print_debug("smbus: ");
+ print_debug_hex8(device);
+ for(j = 0; j < 256; j++) {
+ int status;
+ unsigned char byte;
+ if ((j & 0xf) == 0) {
+ print_debug("\r\n");
+ print_debug_hex8(j);
+ print_debug(": ");
+ }
+ status = smbus_read_byte(device, j);
+ if (status < 0) {
+ print_debug("bad device\r\n");
+ break;
+ }
+ byte = status & 0xff;
+ print_debug_hex8(byte);
+ print_debug_char(' ');
+ }
+ print_debug("\r\n");
+ }
+}