diff options
| author | Lijian Zhao <lijian.zhao@intel.com> | 2017-09-06 16:47:17 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-09-11 18:14:35 +0000 |
| commit | bfabe62a6e5cdd9e29394b12737c5ed9bd080036 (patch) | |
| tree | 6a190f588a2da452fdfd89c68bf31279cd9aa61a /src | |
| parent | 0a712c33379799b13215068e4dcbad8272d38ccc (diff) | |
| download | coreboot-bfabe62a6e5cdd9e29394b12737c5ed9bd080036.tar.xz | |
soc/intel/common/block: Update common rtc code
Move rtc init code into common area and update the implementation for
apollolake to avoid build break.
Change-Id: I702ce0efba25cb6fde33cc15698ae44312742367
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/21433
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/apollolake/lpc.c | 13 | ||||
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/rtc.h | 5 | ||||
| -rw-r--r-- | src/soc/intel/common/block/rtc/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/soc/intel/common/block/rtc/rtc.c | 23 |
4 files changed, 32 insertions, 11 deletions
diff --git a/src/soc/intel/apollolake/lpc.c b/src/soc/intel/apollolake/lpc.c index 6c7ffff200..0cd58de7a8 100644 --- a/src/soc/intel/apollolake/lpc.c +++ b/src/soc/intel/apollolake/lpc.c @@ -83,23 +83,16 @@ void lpc_configure_pads(void) gpio_configure_pads(lpc_gpios, ARRAY_SIZE(lpc_gpios)); } -static void rtc_init(void) +int soc_get_rtc_failed(void) { - int rtc_fail; const struct chipset_power_state *ps = cbmem_find(CBMEM_ID_POWER_STATE); if (!ps) { printk(BIOS_ERR, "Could not find power state in cbmem, RTC init aborted\n"); - return; + return 1; } - rtc_fail = !!(ps->gen_pmcon1 & RPS); - /* Ensure the date is set including century byte. */ - cmos_check_update_date(); - if (IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS)) - init_vbnv_cmos(rtc_fail); - else - cmos_init(rtc_fail); + return !!(ps->gen_pmcon1 & RPS); } void lpc_init(struct device *dev) diff --git a/src/soc/intel/common/block/include/intelblocks/rtc.h b/src/soc/intel/common/block/include/intelblocks/rtc.h index 1556026753..c6507c84f9 100644 --- a/src/soc/intel/common/block/include/intelblocks/rtc.h +++ b/src/soc/intel/common/block/include/intelblocks/rtc.h @@ -18,4 +18,9 @@ void enable_rtc_upper_bank(void); +/* Expect return rtc failed bootlean in case of coin removal */ +int soc_get_rtc_failed(void); + +void rtc_init(void); + #endif /* SOC_INTEL_COMMON_BLOCK_RTC_H */ diff --git a/src/soc/intel/common/block/rtc/Makefile.inc b/src/soc/intel/common/block/rtc/Makefile.inc index 2d2d4e3954..95f665919d 100644 --- a/src/soc/intel/common/block/rtc/Makefile.inc +++ b/src/soc/intel/common/block/rtc/Makefile.inc @@ -1 +1,3 @@ bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_RTC) += rtc.c + +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_RTC) += rtc.c diff --git a/src/soc/intel/common/block/rtc/rtc.c b/src/soc/intel/common/block/rtc/rtc.c index ea9987074b..04c07687db 100644 --- a/src/soc/intel/common/block/rtc/rtc.c +++ b/src/soc/intel/common/block/rtc/rtc.c @@ -13,9 +13,11 @@ * GNU General Public License for more details. */ -#include <soc/pcr_ids.h> #include <intelblocks/pcr.h> #include <intelblocks/rtc.h> +#include <soc/pcr_ids.h> +#include <pc80/mc146818rtc.h> +#include <vboot/vbnv.h> /* RTC PCR configuration */ #define PCR_RTC_CONF 0x3400 @@ -29,3 +31,22 @@ void enable_rtc_upper_bank(void) /* Enable upper 128 bytes of CMOS */ pcr_or32(PID_RTC, PCR_RTC_CONF, PCR_RTC_CONF_UCMOS_EN); } + +__attribute__((weak)) int soc_get_rtc_failed(void) +{ + return 0; +} + +void rtc_init(void) +{ + int rtc_failed; + + rtc_failed = soc_get_rtc_failed(); + /* Ensure the date is set including century byte. */ + cmos_check_update_date(); + + if (IS_ENABLED(CONFIG_VBOOT_VBNV_CMOS)) + init_vbnv_cmos(rtc_failed); + else + cmos_init(rtc_failed); +} |