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authorStefan Reinauer <stepan@coresystems.de>2010-09-23 18:29:40 +0000
committerStefan Reinauer <stepan@openbios.org>2010-09-23 18:29:40 +0000
commitd6b4f1cd0ad43d29fe925a6cc6951f205a8ead50 (patch)
tree2c7b6d352ad0ee6064f976f3f9c09ecabcb7e9c8 /src
parent06694a89528329e0a1bff2b9adf83f0f30e1a77e (diff)
downloadcoreboot-d6b4f1cd0ad43d29fe925a6cc6951f205a8ead50.tar.xz
Fix some wrong capitalizations, reformat comments, fix a typo.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5829 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r--src/boot/selfboot.c2
-rw-r--r--src/console/Kconfig4
-rw-r--r--src/include/device/resource.h2
-rw-r--r--src/lib/lzma.c19
-rw-r--r--src/mainboard/via/epia-n/acpi/irq_links.asl8
-rw-r--r--src/mainboard/via/epia-n/acpi/pata_methods.asl15
6 files changed, 25 insertions, 25 deletions
diff --git a/src/boot/selfboot.c b/src/boot/selfboot.c
index f3f1aa38c5..ac43e4aba5 100644
--- a/src/boot/selfboot.c
+++ b/src/boot/selfboot.c
@@ -175,7 +175,7 @@ static int valid_area(struct lb_memory *mem, unsigned long buffer,
break;
}
if ((mtype == LB_MEM_TABLE) && (start < mend) && (end > mstart)) {
- printk(BIOS_ERR, "Payload is overwriting Coreboot tables.\n");
+ printk(BIOS_ERR, "Payload is overwriting coreboot tables.\n");
break;
}
}
diff --git a/src/console/Kconfig b/src/console/Kconfig
index 080b37f390..c7e205565b 100644
--- a/src/console/Kconfig
+++ b/src/console/Kconfig
@@ -156,10 +156,10 @@ config CONSOLE_NE2K_DST_IP
config CONSOLE_NE2K_SRC_IP
depends on CONSOLE_NE2K
- string "IP adress of Coreboot system"
+ string "IP address of coreboot system"
default "10.0.1.253"
help
- This is the IP of the Coreboot system
+ This is the IP of the coreboot system
config CONSOLE_NE2K_IO_PORT
depends on CONSOLE_NE2K
diff --git a/src/include/device/resource.h b/src/include/device/resource.h
index b2e3e995b5..ef95b5334d 100644
--- a/src/include/device/resource.h
+++ b/src/include/device/resource.h
@@ -20,7 +20,7 @@
* to the bus below.
*/
#define IORESOURCE_BRIDGE 0x00080000 /* The IO resource has a bus below it. */
-#define IORESOURCE_RESERVE 0x10000000 /* The resource needs to be reserved in the Coreboot table */
+#define IORESOURCE_RESERVE 0x10000000 /* The resource needs to be reserved in the coreboot table */
#define IORESOURCE_STORED 0x20000000 /* The IO resource assignment has been stored in the device */
#define IORESOURCE_ASSIGNED 0x40000000 /* An IO resource that has been assigned a value */
#define IORESOURCE_FIXED 0x80000000 /* An IO resource the allocator must not change */
diff --git a/src/lib/lzma.c b/src/lib/lzma.c
index be0f386bdf..bc38f353f9 100644
--- a/src/lib/lzma.c
+++ b/src/lib/lzma.c
@@ -1,14 +1,13 @@
/*
-
-Coreboot interface to memory-saving variant of LZMA decoder
-
-(C)opyright 2006 Carl-Daniel Hailfinger
-Released under the GNU GPL v2 or later
-
-Parts of this file are based on C/7zip/Compress/LZMA_C/LzmaTest.c from the LZMA
-SDK 4.42, which is written and distributed to public domain by Igor Pavlov.
-
-*/
+ * coreboot interface to memory-saving variant of LZMA decoder
+ *
+ * Copyright (C) 2006 Carl-Daniel Hailfinger
+ * Released under the GNU GPL v2 or later
+ *
+ * Parts of this file are based on C/7zip/Compress/LZMA_C/LzmaTest.c from the LZMA
+ * SDK 4.42, which is written and distributed to public domain by Igor Pavlov.
+ *
+ */
#include "lzmadecode.c"
#include <console/console.h>
diff --git a/src/mainboard/via/epia-n/acpi/irq_links.asl b/src/mainboard/via/epia-n/acpi/irq_links.asl
index fc93e760b5..29b2a1bbc8 100644
--- a/src/mainboard/via/epia-n/acpi/irq_links.asl
+++ b/src/mainboard/via/epia-n/acpi/irq_links.asl
@@ -16,7 +16,7 @@
/* Status - always return ready */
Method (_STA, 0, NotSerialized)
{
- /* See If Coreboot has allocated INTA# */
+ /* See if coreboot has allocated INTA# */
And (PIRA, 0xF0, Local0)
If (LEqual (Local0, 0x00))
{
@@ -94,7 +94,7 @@
Name (_UID, 0x02)
Method (_STA, 0, NotSerialized)
{
- /* See If Coreboot has allocated INTB# */
+ /* See if coreboot has allocated INTB# */
And (PIBC, 0x0F, Local0)
If (LEqual (Local0, 0x00))
{
@@ -172,7 +172,7 @@
Name (_UID, 0x03)
Method (_STA, 0, NotSerialized)
{
- /* See If Coreboot has allocated INTC# */
+ /* See if coreboot has allocated INTC# */
And (PIBC, 0xF0, Local0)
If (LEqual (Local0, 0x00))
{
@@ -251,7 +251,7 @@ Device (LNKD)
Name (_UID, 0x04)
Method (_STA, 0, NotSerialized)
{
- /* See If Coreboot has allocated INTD# */
+ /* See if coreboot has allocated INTD# */
And (PIRD, 0xF0, Local0)
If (LEqual (Local0, 0x00))
{
diff --git a/src/mainboard/via/epia-n/acpi/pata_methods.asl b/src/mainboard/via/epia-n/acpi/pata_methods.asl
index 68d505868e..6106fc9a36 100644
--- a/src/mainboard/via/epia-n/acpi/pata_methods.asl
+++ b/src/mainboard/via/epia-n/acpi/pata_methods.asl
@@ -47,13 +47,14 @@ Name (TIM0, Package (0x07)
})
-/* This method sets up the PATA Timing Control*/
-/* Note that a lot of this is done in the */
-/* Coreboot VT8237R Init code, but this is */
-/* already getting very cluttered with board */
-/* specific code. Using ACPI will allow this */
-/* to be de-cluttered a bit (so long as we're */
-/* running a ACPI Capable OS !!!) */
+/* This method sets up the PATA Timing Control.
+ * Note that a lot of this is done in the
+ * coreboot VT8237R init code, but this is
+ * already getting very cluttered with board
+ * specific code. Using ACPI will allow this
+ * to be de-cluttered a bit (so long as we're
+ * running a ACPI capable OS!)
+ */
Method (PMEX, 0, Serialized)
{