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authorElyes HAOUAS <ehaouas@noos.fr>2016-09-28 21:41:06 +0200
committerMartin Roth <martinroth@google.com>2016-09-29 23:52:13 +0200
commit127b5d1270fc3c7ea8be7c80670be8dcd9ea4147 (patch)
tree6f0c450b42409341ff93a953fd4f3b811fb28144 /src
parent0c31a677b0dbc17b0909a5f6d5f0ab31294bd36b (diff)
downloadcoreboot-127b5d1270fc3c7ea8be7c80670be8dcd9ea4147.tar.xz
mainboard/asus/kfsn4-dre_k8/romstage.c: Use tabs for indents
Change-Id: If6b36ebef49dd2733d272f990bb7c6623d4ab1b1 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16785 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/asus/kfsn4-dre_k8/romstage.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/src/mainboard/asus/kfsn4-dre_k8/romstage.c b/src/mainboard/asus/kfsn4-dre_k8/romstage.c
index b547461be5..03a095d054 100644
--- a/src/mainboard/asus/kfsn4-dre_k8/romstage.c
+++ b/src/mainboard/asus/kfsn4-dre_k8/romstage.c
@@ -299,11 +299,11 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "ck804_early_setup_x()\n");
needs_reset |= ck804_early_setup_x();
- /* FIDVID change will issue one LDTSTOP and the HT change will be effective too */
- if (needs_reset) {
- printk(BIOS_INFO, "ht reset -\n");
- soft_reset();
- }
+ /* FIDVID change will issue one LDTSTOP and the HT change will be effective too */
+ if (needs_reset) {
+ printk(BIOS_INFO, "ht reset -\n");
+ soft_reset();
+ }
post_code(0x3b);
@@ -323,8 +323,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
* IS_ENABLED(CONFIG_DEBUG_SMBUS) uncomment this block
*/
if (IS_ENABLED(CONFIG_DEBUG_SMBUS)) {
- dump_spd_registers(&cpu[0]);
- dump_smbus_registers();
+ dump_spd_registers(&cpu[0]);
+ dump_smbus_registers();
}
#endif
@@ -348,8 +348,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* Initialize GPIO */
/* Access SuperIO GPI03 logical device */
uint16_t port = GPIO3_DEV >> 8;
- outb(0x87, port);
- outb(0x87, port);
+ outb(0x87, port);
+ outb(0x87, port);
pnp_set_logical_device(GPIO3_DEV);
/* Set GP37 (power LED) to output */
pnp_write_config(GPIO3_DEV, 0xf0, 0x7f);