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authorFrans Hendriks <fhendriks@eltan.com>2018-12-11 15:21:47 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-02-28 17:04:12 +0000
commit255f35c2d222e4d7f45aada664284df4b7ed45e3 (patch)
tree274674db9a49b7d9ad871e4d725ea35c7d13046d /src
parent9348413c61b22300ce23baf4503825219249a5ad (diff)
downloadcoreboot-255f35c2d222e4d7f45aada664284df4b7ed45e3.tar.xz
src/soc/intel/braswell/southcluster.c: Config ISA DMA controller
ISA dma controller is not configured. Add call isa_dma_init(). BUG=N/A TEST=Intel CherryHill CRB Change-Id: Ib7af3f4ef6d6a29628bb2c27d32071be63ff6af2 Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-on: https://review.coreboot.org/c/29415 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/braswell/southcluster.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c
index 418035f493..dc918ebf4c 100644
--- a/src/soc/intel/braswell/southcluster.c
+++ b/src/soc/intel/braswell/southcluster.c
@@ -26,6 +26,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
+#include <pc80/isa-dma.h>
#include <pc80/i8254.h>
#include <pc80/i8259.h>
#include <romstage_handoff.h>
@@ -268,6 +269,8 @@ static void sc_init(struct device *dev)
printk(BIOS_SPEW, "%s/%s (%s)\n",
__FILE__, __func__, dev_name(dev));
+ isa_dma_init();
+
/* Set up the PIRQ PIC routing based on static config. */
for (i = 0; i < NUM_PIRQS; i++)
write8((void *)(pr_base + i*sizeof(ir->pic[i])),