diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-10-03 07:17:18 +0200 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2019-10-06 10:14:43 +0000 |
| commit | 3a46e0296484d855aea9ffdf8b39573322d62dc7 (patch) | |
| tree | 73375c82dcadb7c864bc93f235ccc2d43484d8a1 /src | |
| parent | 39f8a1aaf98ebb637f0ec74cbe47b8a7ee1a9f33 (diff) | |
| download | coreboot-3a46e0296484d855aea9ffdf8b39573322d62dc7.tar.xz | |
sb/intel/ibexpeak: Don't clear PMBASE regs in romstage
X201 boots fine without it.
Change-Id: I20a8e598b07bf0a059dcb47651d1a26456863673
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35769
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/lenovo/x201/romstage.c | 29 | ||||
| -rw-r--r-- | src/mainboard/packardbell/ms2290/romstage.c | 37 |
2 files changed, 0 insertions, 66 deletions
diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c index 010ab86887..65abc3669a 100644 --- a/src/mainboard/lenovo/x201/romstage.c +++ b/src/mainboard/lenovo/x201/romstage.c @@ -94,21 +94,6 @@ static void rcba_config(void) early_usb_init(mainboard_usb_ports); } -static inline void write_acpi32(u32 addr, u32 val) -{ - outl(val, DEFAULT_PMBASE | addr); -} - -static inline void write_acpi16(u32 addr, u16 val) -{ - outw(val, DEFAULT_PMBASE | addr); -} - -static inline u32 read_acpi32(u32 addr) -{ - return inl(DEFAULT_PMBASE | addr); -} - static void set_fsb_frequency(void) { u8 block[5]; @@ -179,20 +164,6 @@ void mainboard_romstage_entry(void) outb(0x50, 0x15ec); outb(inb(0x15ee) & 0x70, 0x15ee); - write_acpi16(0x2, 0x0); - write_acpi32(0x28, 0x0); - write_acpi32(0x2c, 0x0); - if (!s3resume) { - read_acpi32(0x4); - read_acpi32(0x20); - read_acpi32(0x34); - write_acpi16(0x0, 0x900); - write_acpi32(0x20, 0xffff7ffe); - write_acpi32(0x34, 0x56974); - pci_write_config8(PCH_LPC_DEV, GEN_PMCON_3, - pci_read_config8(PCH_LPC_DEV, GEN_PMCON_3) | 2); - } - early_thermal_init(); timestamp_add_now(TS_BEFORE_INITRAM); diff --git a/src/mainboard/packardbell/ms2290/romstage.c b/src/mainboard/packardbell/ms2290/romstage.c index 2aeee1ec3a..6cee71165c 100644 --- a/src/mainboard/packardbell/ms2290/romstage.c +++ b/src/mainboard/packardbell/ms2290/romstage.c @@ -90,29 +90,6 @@ static void rcba_config(void) early_usb_init(mainboard_usb_ports); } -static inline void write_acpi32(u32 addr, u32 val) -{ - outl(val, DEFAULT_PMBASE | addr); -} - -static inline void write_acpi16(u32 addr, u16 val) -{ - outw(val, DEFAULT_PMBASE | addr); -} - -static inline u32 read_acpi32(u32 addr) -{ - return inl(DEFAULT_PMBASE | addr); -} - -// unused func - used for RE -#if 0 -static inline u16 read_acpi16(u32 addr) -{ - return inw(DEFAULT_PMBASE | addr); -} -#endif - void mainboard_romstage_entry(void) { u32 reg32; @@ -168,20 +145,6 @@ void mainboard_romstage_entry(void) /* Enable SMBUS. */ enable_smbus(); - write_acpi16(0x2, 0x0); - write_acpi32(0x28, 0x0); - write_acpi32(0x2c, 0x0); - if (!s3resume) { - read_acpi32(0x4); - read_acpi32(0x20); - read_acpi32(0x34); - write_acpi16(0x0, 0x900); - write_acpi32(0x20, 0xffff7ffe); - write_acpi32(0x34, 0x56974); - pci_write_config8(PCH_LPC_DEV, GEN_PMCON_3, - pci_read_config8(PCH_LPC_DEV, GEN_PMCON_3) | 2); - } - early_thermal_init(); timestamp_add_now(TS_BEFORE_INITRAM); |