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authorMichael Tasche <michael.tasche@esd.eu>2015-12-02 17:34:47 +0100
committerMartin Roth <martinroth@google.com>2015-12-04 18:58:02 +0100
commit4d166f93807f7079f27c659562462c94c27e345f (patch)
tree325a71a898d5f7a5cc6a64274019e41958b99922 /src
parent886f47892502df15d9bb4fd0e4be3a2bde1aa5f6 (diff)
downloadcoreboot-4d166f93807f7079f27c659562462c94c27e345f.tar.xz
intel/minnowmax: Fix IRQ connection for legacy uart at 0x3f8
The E38xx legacy uart fires IRQ4, not IRQ3. PCI based IRQ A is switched from IRQ4 to IRQ3, to get a working IRQ for the legacy uart. Change-Id: Ibc8e824c92bf1b9a92594ddc5d8a06726c9f1744 Signed-off-by: Michael Tasche <michael.tasche@esd.eu> Reviewed-on: https://review.coreboot.org/12622 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/intel/minnowmax/irqroute.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/intel/minnowmax/irqroute.h b/src/mainboard/intel/minnowmax/irqroute.h
index bdf3d9467a..f8660693e5 100644
--- a/src/mainboard/intel/minnowmax/irqroute.h
+++ b/src/mainboard/intel/minnowmax/irqroute.h
@@ -70,7 +70,7 @@
* Floppy: 6
*/
#define PIRQ_PIC_ROUTES \
- PIRQ_PIC(A, 4), \
+ PIRQ_PIC(A, 3), \
PIRQ_PIC(B, 5), \
PIRQ_PIC(C, 7), \
PIRQ_PIC(D, 10), \