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authorElyes HAOUAS <ehaouas@noos.fr>2020-08-04 13:27:52 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-08-05 11:37:00 +0000
commit5ba154a597e7177e34a588cd9e07a4cc7f16b837 (patch)
treef62c855f21ae9f4062ed09dee239f9c00428c486 /src
parent6aa9d668739a29ebbaabd435d261f90176a72261 (diff)
downloadcoreboot-5ba154a597e7177e34a588cd9e07a4cc7f16b837.tar.xz
src: Use space after 'if', 'for'
Change-Id: I5d3a5ede47aefc7cc2ee330f8a0bcded16138764 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44173 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/device/oprom/realmode/x86.c2
-rw-r--r--src/mainboard/google/peach_pit/mainboard.c2
-rw-r--r--src/mainboard/google/peach_pit/romstage.c6
-rw-r--r--src/mainboard/roda/rk886ex/m3885.c2
-rw-r--r--src/northbridge/intel/x4x/dq_dqs.c2
-rw-r--r--src/northbridge/intel/x4x/raminit_ddr23.c2
-rw-r--r--src/soc/intel/skylake/sd.c2
7 files changed, 9 insertions, 9 deletions
diff --git a/src/device/oprom/realmode/x86.c b/src/device/oprom/realmode/x86.c
index 5215934ed5..d230d5cbea 100644
--- a/src/device/oprom/realmode/x86.c
+++ b/src/device/oprom/realmode/x86.c
@@ -130,7 +130,7 @@ static void setup_interrupt_handlers(void)
{
/* If the mainboard_interrupt_handler isn't called first.
*/
- if(!intXX_handler[i])
+ if (!intXX_handler[i])
{
/* Now set the default functions that are actually
* needed to initialize the option roms. This is
diff --git a/src/mainboard/google/peach_pit/mainboard.c b/src/mainboard/google/peach_pit/mainboard.c
index 8b54b9977a..33541b231e 100644
--- a/src/mainboard/google/peach_pit/mainboard.c
+++ b/src/mainboard/google/peach_pit/mainboard.c
@@ -254,7 +254,7 @@ static void parade_dp_bridge_setup(void)
* we're out of here.
* If it's not ready after a second, then we're in big trouble.
*/
- for(i = 0; i < 1000; i++){
+ for (i = 0; i < 1000; i++){
if (gpio_get_value(dp_hpd))
break;
mdelay(1);
diff --git a/src/mainboard/google/peach_pit/romstage.c b/src/mainboard/google/peach_pit/romstage.c
index d99db809ef..53fdfbacd4 100644
--- a/src/mainboard/google/peach_pit/romstage.c
+++ b/src/mainboard/google/peach_pit/romstage.c
@@ -129,13 +129,13 @@ static unsigned long primitive_mem_test(void)
unsigned long *l = (void *)0x40000000;
int bad = 0;
unsigned long i;
- for(i = 0; i < 256*1048576; i++){
+ for (i = 0; i < 256*1048576; i++){
if (! (i%1048576))
printk(BIOS_SPEW, "%lu ...", i);
l[i] = 0xffffffff - i;
}
- for(i = 0; i < 256*1048576; i++){
+ for (i = 0; i < 256*1048576; i++){
if (! (i%1048576))
printk(BIOS_SPEW, "%lu ...", i);
if (l[i] != (0xffffffff - i)){
@@ -177,7 +177,7 @@ static void simple_spi_test(void)
}
- for(i = 0; i < amt; i += 4){
+ for (i = 0; i < amt; i += 4){
if (rdev_readat(boot_dev, &in, i, 4) < 4) {
printk(BIOS_SPEW, "simple_spi_test fails at %d\n", i);
return;
diff --git a/src/mainboard/roda/rk886ex/m3885.c b/src/mainboard/roda/rk886ex/m3885.c
index 6756e0e9b3..59dd575670 100644
--- a/src/mainboard/roda/rk886ex/m3885.c
+++ b/src/mainboard/roda/rk886ex/m3885.c
@@ -251,7 +251,7 @@ void m3885_configure_multikey(void)
maxvars = m3885_get_variable(0x00);
printk(BIOS_DEBUG, "M388x has %d variables in original bank.\n", maxvars);
for (i = 0; i < ARRAY_SIZE(variables); i+=3) {
- if(variables[i + 0] > maxvars)
+ if (variables[i + 0] > maxvars)
continue;
reg8 = m3885_get_variable(variables[i + 0]);
reg8 &= ~(variables[i + 1]);
diff --git a/src/northbridge/intel/x4x/dq_dqs.c b/src/northbridge/intel/x4x/dq_dqs.c
index 52166ed7e0..489340a2bd 100644
--- a/src/northbridge/intel/x4x/dq_dqs.c
+++ b/src/northbridge/intel/x4x/dq_dqs.c
@@ -498,7 +498,7 @@ int do_read_training(struct sysinfo *s)
FOR_EACH_BYTELANE(lane) {
saved_dqs_center[channel][lane] /= RT_LOOPS;
while (saved_dqs_center[channel][lane]--) {
- if(rt_increment_dqs(&s->rt_dqs[channel][lane])
+ if (rt_increment_dqs(&s->rt_dqs[channel][lane])
== CB_ERR)
/* Should never happen */
printk(BIOS_ERR,
diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c
index 1aa7e394ef..7c12ee0602 100644
--- a/src/northbridge/intel/x4x/raminit_ddr23.c
+++ b/src/northbridge/intel/x4x/raminit_ddr23.c
@@ -2166,7 +2166,7 @@ void do_raminit(struct sysinfo *s, int fast_boot)
if (!fast_boot) {
if (s->selected_timings.mem_clk > MEM_CLOCK_667MHz) {
- if(do_write_training(s))
+ if (do_write_training(s))
die("DQ write training failed!");
}
if (do_read_training(s))
diff --git a/src/soc/intel/skylake/sd.c b/src/soc/intel/skylake/sd.c
index 1f40d98255..ba56182af1 100644
--- a/src/soc/intel/skylake/sd.c
+++ b/src/soc/intel/skylake/sd.c
@@ -8,7 +8,7 @@ int sd_fill_soc_gpio_info(struct acpi_gpio* gpio, const struct device *dev)
config_t *config = config_of(dev);
/* Nothing to write if GPIO is not set in devicetree */
- if(!config->sdcard_cd_gpio_default && !config->sdcard_cd_gpio.pins[0])
+ if (!config->sdcard_cd_gpio_default && !config->sdcard_cd_gpio.pins[0])
return -1;
if (config->sdcard_cd_gpio_default) {