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| author | Mike Loptien <mike.loptien@se-eng.com> | 2013-03-13 16:28:16 -0600 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-03-13 23:44:00 +0100 |
| commit | 7bc153c6aef0f2615e3dadb274b9fed56ed15732 (patch) | |
| tree | 3e40f1f91fdbc22ab8e5eb52a3e83fdbe514e346 /src | |
| parent | 00e5da6f25483f5d29aefadfff56a11dd0f3c97c (diff) | |
| download | coreboot-7bc153c6aef0f2615e3dadb274b9fed56ed15732.tar.xz | |
Eagleheights DSDT: Grant OS control through OSC
Change the OSC method to actually grant control of
PCIe capabilities to the OS instead of granting no
control. I believe the logic was backwards in the
original commit. Bits should be set when granting
control and cleared when not granting control. By
setting the return value to 0x00, we effectively
tell the OS that it cannot control any PCIe
capability. See section 6.2.9 of the ACPI spec
version 3.0 for more information.
This edit is a duplication of the OSC method that
is in the src/southbridge/intel/bd82x6x/pch.asl
file.
Change-Id: Id2462ab12203afceb9033f24d06b4dfbf2236d2e
Signed-off-by: Mike Loptien <mike.loptien@se-eng.com>
Reviewed-on: http://review.coreboot.org/2714
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/intel/eagleheights/dsdt.asl | 45 |
1 files changed, 3 insertions, 42 deletions
diff --git a/src/mainboard/intel/eagleheights/dsdt.asl b/src/mainboard/intel/eagleheights/dsdt.asl index 507d250191..cb9ec8e948 100644 --- a/src/mainboard/intel/eagleheights/dsdt.asl +++ b/src/mainboard/intel/eagleheights/dsdt.asl @@ -179,50 +179,11 @@ DefinitionBlock ("DSDT", "DSDT", 1, "EAGLE", "COREBOOT", 0x0000001) Method (_OSC, 4) { /* Check for proper GUID */ - If (LEqual (Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) - { - /* Create DWORD-adressable field from the Capabilities Buffer */ - CreateDWordField (Arg3, 0, CDW1) - CreateDWordField (Arg3, 4, CDW2) - CreateDWordField (Arg3, 8, CDW3) - - /* Save Capabilities DWord 2 & 3 */ - Store (CDW2, SUPP) - Store (CDW3, CTRL) - - /* Don't care of OS capabilites */ - /* We support nothing (maybe we should add PCIe Capability Structure Control) */ - And (CTRL, 0x00, CTRL) - - /* Query flag clear ? */ - If (Not (And (CDW1, 1))) + If (LEqual (Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) { - /* Nothing to do */ + /* Let OS control everything */ + Return (Arg3) } - - /* Unknown revision ? */ - If (LNotEqual (Arg1, One)) - { - Or (CDW1, 0x08, CDW1) - } - - /* Capabilities bits masked ? */ - If (LNotEqual (CDW3, CTRL)) - { - Or (CDW1, 0x10, CDW1) - } - - /* Update DWORD3 in the buffer */ - Store (CTRL, CDW3) - - Return (Arg3) - } - Else - { - /* Unrecognized UUID */ - Or (CDW1, 4, CDW1) - Return (Arg3) - } } /* End _OSC */ Method (_PRT, 0, NotSerialized) |