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authorSubrata Banik <subrata.banik@intel.com>2020-04-30 12:23:16 +0530
committerPatrick Georgi <pgeorgi@google.com>2020-05-01 06:56:45 +0000
commit7be0df8dd354d87c2482ac2d2cca29628297bd03 (patch)
treebff5e3633287ab339eee5a2521415fc42ef60939 /src
parent1d17529954fda73460ef2441706139967e3a6b78 (diff)
downloadcoreboot-7be0df8dd354d87c2482ac2d2cca29628297bd03.tar.xz
soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better understanding
BIT 1 -> DEBUG_INTERFACE_UART_8250IO BIT 4 -> DEBUG_INTERFACE_LPSS_SERIAL_IO Change-Id: I566b9dc82b2289af42e58705ebeee51179886f1f Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40904 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/jasperlake/chip.h4
-rw-r--r--src/soc/intel/jasperlake/romstage/fsp_params.c2
-rw-r--r--src/soc/intel/tigerlake/chip.h4
-rw-r--r--src/soc/intel/tigerlake/romstage/fsp_params.c2
4 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/intel/jasperlake/chip.h b/src/soc/intel/jasperlake/chip.h
index a6932bc52c..886f823711 100644
--- a/src/soc/intel/jasperlake/chip.h
+++ b/src/soc/intel/jasperlake/chip.h
@@ -201,9 +201,9 @@ struct soc_intel_jasperlake_config {
/* Debug interface selection */
enum {
DEBUG_INTERFACE_RAM = (1 << 0),
- DEBUG_INTERFACE_UART = (1 << 1),
+ DEBUG_INTERFACE_UART_8250IO = (1 << 1),
DEBUG_INTERFACE_USB3 = (1 << 3),
- DEBUG_INTERFACE_SERIAL_IO = (1 << 4),
+ DEBUG_INTERFACE_LPSS_SERIAL_IO = (1 << 4),
DEBUG_INTERFACE_TRACEHUB = (1 << 5),
} debug_interface_flag;
diff --git a/src/soc/intel/jasperlake/romstage/fsp_params.c b/src/soc/intel/jasperlake/romstage/fsp_params.c
index a841809499..bb7db65dd7 100644
--- a/src/soc/intel/jasperlake/romstage/fsp_params.c
+++ b/src/soc/intel/jasperlake/romstage/fsp_params.c
@@ -60,7 +60,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
/* Set debug interface flags */
m_cfg->PcdDebugInterfaceFlags = CONFIG(DRIVERS_UART_8250IO) ?
- DEBUG_INTERFACE_UART : DEBUG_INTERFACE_SERIAL_IO;
+ DEBUG_INTERFACE_UART_8250IO : DEBUG_INTERFACE_LPSS_SERIAL_IO;
/* TraceHub configuration */
dev = pcidev_path_on_root(PCH_DEVFN_TRACEHUB);
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index fe338352fb..9f12dae1d9 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -198,9 +198,9 @@ struct soc_intel_tigerlake_config {
/* Debug interface selection */
enum {
DEBUG_INTERFACE_RAM = (1 << 0),
- DEBUG_INTERFACE_UART = (1 << 1),
+ DEBUG_INTERFACE_UART_8250IO = (1 << 1),
DEBUG_INTERFACE_USB3 = (1 << 3),
- DEBUG_INTERFACE_SERIAL_IO = (1 << 4),
+ DEBUG_INTERFACE_LPSS_SERIAL_IO = (1 << 4),
DEBUG_INTERFACE_TRACEHUB = (1 << 5),
} debug_interface_flag;
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params.c b/src/soc/intel/tigerlake/romstage/fsp_params.c
index b4521e2a61..022cd830c9 100644
--- a/src/soc/intel/tigerlake/romstage/fsp_params.c
+++ b/src/soc/intel/tigerlake/romstage/fsp_params.c
@@ -71,7 +71,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
/* Set debug interface flags */
m_cfg->PcdDebugInterfaceFlags = CONFIG(DRIVERS_UART_8250IO) ?
- DEBUG_INTERFACE_UART : DEBUG_INTERFACE_SERIAL_IO;
+ DEBUG_INTERFACE_UART_8250IO : DEBUG_INTERFACE_LPSS_SERIAL_IO;
/* TraceHub configuration */
dev = pcidev_path_on_root(PCH_DEVFN_TRACEHUB);