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authorKerry She <Kerry.she@amd.com>2010-08-30 09:40:41 +0000
committerKerry She <Kerry.She@amd.com>2010-08-30 09:40:41 +0000
commit819ee74888c7c482cfec037b28dc37bbc2fb1ef1 (patch)
tree0c17390b025a508ff30d1eb6277e216fd40ef102 /src
parent99cfa1e6bdc7e89f571a52ed636704be894418d1 (diff)
downloadcoreboot-819ee74888c7c482cfec037b28dc37bbc2fb1ef1.tar.xz
Multi-DIMMS on AMD ddr2 MCT channel B fixed.
Signed-off-by: Kerry She <Kerry.she@amd.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5749 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r--src/northbridge/amd/amdmct/mct/mctdqs_d.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/amd/amdmct/mct/mctdqs_d.c b/src/northbridge/amd/amdmct/mct/mctdqs_d.c
index f3d880a00e..26205200fd 100644
--- a/src/northbridge/amd/amdmct/mct/mctdqs_d.c
+++ b/src/northbridge/amd/amdmct/mct/mctdqs_d.c
@@ -1086,12 +1086,12 @@ u32 mct_GetMCTSysAddr_D(struct MCTStatStruc *pMCTstat,
*valid = 0;
- if (!pDCTstat->GangedMode) { // FIXME: not used.
+ if (!pDCTstat->GangedMode) {
reg_off = 0x100 * Channel;
}
/* get the local base addr of the chipselect */
- reg = 0x40 + (receiver << 2);
+ reg = 0x40 + (receiver << 2) + reg_off;
val = Get_NB32(dev, reg);
val &= ~0x0F;