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authorMartin Roth <martinroth@chromium.org>2018-12-04 15:08:56 -0700
committerPatrick Georgi <pgeorgi@google.com>2018-12-05 14:09:07 +0000
commit822ffe1ef0223664a27ca560c17d3cb2a47edf36 (patch)
tree88643dfd24694d49e6a1adc9111a4654202e41be /src
parentad41f5512306d118047d2f7243678ddb32b4b06b (diff)
downloadcoreboot-822ffe1ef0223664a27ca560c17d3cb2a47edf36.tar.xz
soc/amd/stoneyridge: Run romstage mainboard code before AGESA
This is needed so the next patch can set up GPIOs before AGESA runs. BUG=b:120436919 TEST=Verified romstage mainboard code runs before AGESA Change-Id: I76c035e166cd64382b52dff5ae00a6f115cbac9b Signed-off-by: Martin Roth <martinroth@chromium.org> Reviewed-on: https://review.coreboot.org/c/30038 Reviewed-by: Daniel Kurtz <djkurtz@google.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/amd/stoneyridge/romstage.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c
index ed83e1ee1d..931448869e 100644
--- a/src/soc/amd/stoneyridge/romstage.c
+++ b/src/soc/amd/stoneyridge/romstage.c
@@ -96,11 +96,10 @@ asmlinkage void car_stage_entry(void)
if (IS_ENABLED(CONFIG_SOC_AMD_PSP_SELECTABLE_SMU_FW))
load_smu_fw1();
+ mainboard_romstage_entry(s3_resume);
bsp_agesa_call();
- mainboard_romstage_entry(s3_resume);
-
if (!s3_resume) {
post_code(0x40);
do_agesawrapper(agesawrapper_amdinitpost, "amdinitpost");