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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-01-05 17:20:11 +0100 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-09 04:07:29 +0000 |
| commit | 8c70dd66da02f4ee46086f0bdc54b56e39c7054f (patch) | |
| tree | abb1be750104a446eab71e0cd905fd25eec10611 /src | |
| parent | eaea9c987ccb00a60f8ca4c4332deb72c3761a70 (diff) | |
| download | coreboot-8c70dd66da02f4ee46086f0bdc54b56e39c7054f.tar.xz | |
cpu/intel/microcode_asm.S: Fix reading cpuid(1) and checking PF
The value of %ebx was clobbered later on by a cpuid call.
A bitwise and needs to be used to check processor flags.
Change-Id: I29f1fddfe3cc2cbfc7c843b6aff7425f32e12317
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/30680
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/cpu/intel/microcode/microcode_asm.S | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/src/cpu/intel/microcode/microcode_asm.S b/src/cpu/intel/microcode/microcode_asm.S index 039e02a2b7..319785d2de 100644 --- a/src/cpu/intel/microcode/microcode_asm.S +++ b/src/cpu/intel/microcode/microcode_asm.S @@ -88,11 +88,6 @@ update_bsp_microcode: * Current installed microcode revision -> %edx */ - /* Processor family+model signature=cpuid_eax(1) */ - movl $1, %eax - cpuid - movl %eax, %ebx - /* Processor flags * rdmsr 0x17 * pf = 1 << ((msr.hi >> 18) & 7) */ @@ -113,6 +108,10 @@ update_bsp_microcode: wrmsr movl $0x1, %eax cpuid + + /* Processor family+model signature=cpuid_eax(1) */ + movl %eax, %ebx + movl $IA32_BIOS_SIGN_ID, %ecx rdmsr @@ -126,8 +125,8 @@ check_microcode_entry: jne next_entry /* Processor flags */ - cmpl PROCESSOR_FLAG(%esi), %ebp - jne next_entry + test PROCESSOR_FLAG(%esi), %ebp + jz next_entry /* Check if revision is higher than current */ cmpl UPDATE_VER_OFFSET(%esi), %edx |