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authorRichard Spiegel <richard.spiegel@amd.corp-partner.google.com>2018-04-17 10:09:17 -0700
committerMartin Roth <martinroth@google.com>2018-04-24 17:12:51 +0000
commit90b3095093512f048d055a40ffc6b7acbf2a835a (patch)
tree28b08a1f9bbf141a7b207cbc0511260099004a2c /src
parented76908e4a8bea3781a442fe0a3a557a15ebeed9 (diff)
downloadcoreboot-90b3095093512f048d055a40ffc6b7acbf2a835a.tar.xz
mb/google/cyan/spd/spd.c: Fix module part number transfer
With the increase of dimm->module_part_number size from 19 to 21 (commit 35b273eea3) "include/memory_info.h: Change part number field from 19 bytes to 21", this code is now advancing outside DDR3 SPD designated space. The correct size is already defined as LPDDR3_SPD_PART_LEN, use it. Also make sure to 0 terminate the string. BUG=b:77943312 TEST=Build cyan. Change-Id: Iba0ef4149acfc09b7672fce079df06bf1a01dff6 Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/25702 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/cyan/spd/spd.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/mainboard/google/cyan/spd/spd.c b/src/mainboard/google/cyan/spd/spd.c
index 97e14eb758..106faf4c9c 100644
--- a/src/mainboard/google/cyan/spd/spd.c
+++ b/src/mainboard/google/cyan/spd/spd.c
@@ -145,8 +145,9 @@ static void set_dimm_info(uint8_t *spd, struct dimm_info *dimm)
}
dimm->dimm_size = capmb / 8 * busw / devw * ranks; /* MiB */
dimm->mod_type = spd[3] & 0xf;
- memcpy((char *)&dimm->module_part_number[0], &spd[0x80],
- sizeof(dimm->module_part_number) - 1);
+ strncpy((char *)&dimm->module_part_number[0], (char *)&spd[0x80],
+ LPDDR3_SPD_PART_LEN);
+ dimm->module_part_number[LPDDR3_SPD_PART_LEN] = 0;
dimm->mod_id = *(uint16_t *)&spd[0x94];
switch (busw) {