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authorPatrick Rudolph <siro@das-labor.org>2017-05-26 15:26:10 +0200
committerPatrick Rudolph <siro@das-labor.org>2017-05-31 18:11:54 +0200
commita7033936129baff23fd4ad83ca5963795c4c05c6 (patch)
treea2f3c5748f638b6e6005551cddf61b777f623a3b /src
parent7a3d6e143527f03593a48ab321ff03c1a206e06d (diff)
downloadcoreboot-a7033936129baff23fd4ad83ca5963795c4c05c6.tar.xz
mb/lenovo/t430: Fix PCIe hot-plug ports
Port 0 is connected to SD-card reader. Don't mark it as hot-plugable. Change-Id: I5d3d4c7541683a6c09aac47ca251a6dad23ad1ab Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/19928 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/lenovo/t430/devicetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/lenovo/t430/devicetree.cb b/src/mainboard/lenovo/t430/devicetree.cb
index 86c8756bf3..0a121b70fe 100644
--- a/src/mainboard/lenovo/t430/devicetree.cb
+++ b/src/mainboard/lenovo/t430/devicetree.cb
@@ -47,7 +47,7 @@ chip northbridge/intel/sandybridge
register "gpi13_routing" = "2"
register "gpi1_routing" = "2"
register "p_cnt_throttling_supported" = "1"
- register "pcie_hotplug_map" = "{ 1, 0, 1, 0, 0, 0, 0, 0 }"
+ register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
register "pcie_port_coalesce" = "1"
register "sata_interface_speed_support" = "0x3"
register "sata_port_map" = "0x17"