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authorKyösti Mälkki <kyosti.malkki@gmail.com>2015-02-22 09:24:59 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2015-06-05 10:15:23 +0200
commita9f4327d0f40f53fba5ca690f52b98e12236e236 (patch)
treee91849205743edf113e8749070c66572f020b060 /src
parent6326255caa2488d90762470bd0c83b8015c198a9 (diff)
downloadcoreboot-a9f4327d0f40f53fba5ca690f52b98e12236e236.tar.xz
AMD K8 fam10: Fix preprocessor use with SB_HT_CHAIN_ON_BUS0
Change-Id: I6bbd1b5eaa66a640e0a2e132c8d67f38f103caf5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8352 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com> Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Diffstat (limited to 'src')
-rw-r--r--src/northbridge/amd/amdfam10/northbridge.c36
-rw-r--r--src/northbridge/amd/amdk8/northbridge.c28
2 files changed, 26 insertions, 38 deletions
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index fd134a2a80..caf5410618 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -218,29 +218,25 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool
* We have no idea how many busses are behind this bridge yet,
* so we set the subordinate bus number to 0xff for the moment.
*/
-#if CONFIG_SB_HT_CHAIN_ON_BUS0 > 0
- // first chain will on bus 0
- if (is_sblink) { // actually max is 0 here
- min_bus = max;
- }
- #if CONFIG_SB_HT_CHAIN_ON_BUS0 > 1
- // second chain will be on 0x40, third 0x80, forth 0xc0
- // i would refined that to 2, 3, 4 ==> 0, 0x, 40, 0x80, 0xc0
- // >4 will use more segments, We can have 16 segmment and every segment have 256 bus, For that case need the kernel support mmio pci config.
- else {
+
+ if (CONFIG_SB_HT_CHAIN_ON_BUS0 == 0) {
+ min_bus = ++max;
+ } else if (is_sblink) {
+ // first chain will on bus 0
+ min_bus = max; /* actually max is 0 here */
+ } else if (CONFIG_SB_HT_CHAIN_ON_BUS0 == 1) {
+ min_bus = ++max;
+ } else if (CONFIG_SB_HT_CHAIN_ON_BUS0 > 1) {
+ // second chain will be on 0x40, third 0x80, forth 0xc0
+ // i would refined that to 2, 3, 4 ==> 0, 0x, 40, 0x80, 0xc0
+ // >4 will use more segments,
+ // We can have 16 segmment and every segment have 256 bus,
+ // For that case need the kernel support mmio pci config.
+
/* One node can have 8 link and segn is the same. */
min_bus = (((max & 0xff) >> 3) + 1) << 3;
+ max = min_bus;
}
- max = min_bus;
- #else
- //other ...
- else {
- min_bus = ++max;
- }
- #endif
-#else
- min_bus = ++max;
-#endif
link->secondary = min_bus;
link->subordinate = link->secondary;
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index 018b68a8d6..b27404e6e7 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -179,26 +179,18 @@ static u32 amdk8_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool is_
* We have no idea how many busses are behind this bridge yet,
* so we set the subordinate bus number to 0xff for the moment.
*/
-#if CONFIG_SB_HT_CHAIN_ON_BUS0 > 0
- // first chain will on bus 0
- if(is_sblink) { // actually max is 0 here
- min_bus = max;
- }
- #if CONFIG_SB_HT_CHAIN_ON_BUS0 > 1
- // second chain will be on 0x40, third 0x80, forth 0xc0
- else {
- min_bus = ((max>>6) + 1) * 0x40;
- }
- max = min_bus;
- #else
- //other ...
- else {
+ if (CONFIG_SB_HT_CHAIN_ON_BUS0 == 0) {
+ min_bus = ++max;
+ } else if (is_sblink) {
+ // first chain will on bus 0
+ min_bus = max; /* actually max is 0 here */
+ } else if (CONFIG_SB_HT_CHAIN_ON_BUS0 == 1) {
min_bus = ++max;
+ } else if (CONFIG_SB_HT_CHAIN_ON_BUS0 > 1) {
+ /* Second chain will be on 0x40, third 0x80, forth 0xc0. */
+ min_bus = (max & ~0x3f) + 0x40;
+ max = min_bus;
}
- #endif
-#else
- min_bus = ++max;
-#endif
link->secondary = min_bus;
link->subordinate = link->secondary;