diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-08-19 21:51:36 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2020-09-11 17:07:03 +0000 |
commit | ad7c8ffba97b74d70e139b3745ce02ae513d2ef2 (patch) | |
tree | f0469d5b3cafa0537ef1ef50d0cd3fab145b3f21 /src | |
parent | 8b70772ab4b6929eff80906820e0e48bc2d6a5ce (diff) | |
download | coreboot-ad7c8ffba97b74d70e139b3745ce02ae513d2ef2.tar.xz |
src/ec: Drop unneeded empty lines
Change-Id: I1955390fcceeb42ecb644ac74541b7e9dd25320f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44610
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src')
-rw-r--r-- | src/ec/compal/ene932/ec.c | 3 | ||||
-rw-r--r-- | src/ec/compal/ene932/ec.h | 2 | ||||
-rw-r--r-- | src/ec/google/chromeec/chip.h | 1 | ||||
-rw-r--r-- | src/ec/google/chromeec/ec_commands.h | 18 | ||||
-rw-r--r-- | src/ec/google/chromeec/ec_lpc.c | 1 | ||||
-rw-r--r-- | src/ec/lenovo/h8/h8.h | 1 | ||||
-rw-r--r-- | src/ec/quanta/ene_kb3940q/ec.c | 3 | ||||
-rw-r--r-- | src/ec/quanta/ene_kb3940q/ec.h | 3 | ||||
-rw-r--r-- | src/ec/quanta/it8518/ec.c | 5 | ||||
-rw-r--r-- | src/ec/quanta/it8518/ec.h | 1 |
10 files changed, 0 insertions, 38 deletions
diff --git a/src/ec/compal/ene932/ec.c b/src/ec/compal/ene932/ec.c index cacea96e3b..eb0b5ff5ad 100644 --- a/src/ec/compal/ene932/ec.c +++ b/src/ec/compal/ene932/ec.c @@ -25,7 +25,6 @@ static int kbc_input_buffer_empty(void) return !!timeout; } - static int kbc_output_buffer_full(void) { u32 timeout; @@ -58,7 +57,6 @@ int kbc_cleanup_buffers(void) return !!timeout; } - /* The ENE 60/64 EC registers are the same command/status IB/OB KBC pair. * Check status from 64 port before each command. * @@ -88,7 +86,6 @@ void ec_kbc_write_ib(u8 data) outb(data, KBD_DATA); } - /* * These functions are for accessing the ENE932 device space, but are not * currently used. diff --git a/src/ec/compal/ene932/ec.h b/src/ec/compal/ene932/ec.h index d05bc8f177..a1581b5c8f 100644 --- a/src/ec/compal/ene932/ec.h +++ b/src/ec/compal/ene932/ec.h @@ -22,14 +22,12 @@ #define CFG_COMMAND_WRITE_ENABLE (1 << 3) #define CFG_STATUS (1 << 1) - #define KBD_DATA 0x60 #define KBD_COMMAND 0x64 #define KBD_STATUS 0x64 #define KBD_IBF (1 << 1) // 1: input buffer full (data ready for ec) #define KBD_OBF (1 << 0) // 1: output buffer full (data ready for host) - /* Wait 400ms for keyboard controller answers */ #define KBC_TIMEOUT_IN_MS 400 diff --git a/src/ec/google/chromeec/chip.h b/src/ec/google/chromeec/chip.h index 7c3f9661fe..9bfb1c4fd1 100644 --- a/src/ec/google/chromeec/chip.h +++ b/src/ec/google/chromeec/chip.h @@ -3,7 +3,6 @@ #ifndef EC_GOOGLE_CHROMEEC_CHIP_H #define EC_GOOGLE_CHROMEEC_CHIP_H - struct ec_google_chromeec_config { }; diff --git a/src/ec/google/chromeec/ec_commands.h b/src/ec/google/chromeec/ec_commands.h index 62761a29ad..4c3d0bb838 100644 --- a/src/ec/google/chromeec/ec_commands.h +++ b/src/ec/google/chromeec/ec_commands.h @@ -414,7 +414,6 @@ extern "C" { /* Current version of ACPI memory address space */ #define EC_ACPI_MEM_VERSION_CURRENT 2 - /* * This header file is used in coreboot both in C and ACPI code. The ACPI code * is pre-processed to handle constants but the ASL compiler is unable to @@ -1254,7 +1253,6 @@ struct ec_response_get_protocol_info { uint32_t flags; } __ec_align4; - /*****************************************************************************/ /* Get/Set miscellaneous values */ @@ -1664,7 +1662,6 @@ struct ec_params_flash_erase_v1 { /* Rollback information flash region protected now */ #define EC_FLASH_PROTECT_ROLLBACK_NOW BIT(10) - /** * struct ec_params_flash_protect - Parameters for the flash protect command. * @mask: Bits in flags to apply. @@ -1761,7 +1758,6 @@ struct ec_response_vbnvcontext { uint8_t block[EC_VBNV_BLOCK_SIZE]; } __ec_align4; - /* Get SPI flash information */ #define EC_CMD_FLASH_SPI_INFO 0x0018 @@ -1779,7 +1775,6 @@ struct ec_response_flash_spi_info { uint8_t sr1, sr2; } __ec_align1; - /* Select flash during flash operations */ #define EC_CMD_FLASH_SELECT 0x0019 @@ -1791,7 +1786,6 @@ struct ec_params_flash_select { uint8_t select; } __ec_align4; - /** * Request random numbers to be generated and returned. * Can be used to test the random number generator is truly random. @@ -2202,7 +2196,6 @@ struct ec_response_lightbar { struct lightbar_params_v0 get_params_v0; struct lightbar_params_v1 get_params_v1; - struct lightbar_params_v2_timing get_params_v2_timing; struct lightbar_params_v2_tap get_params_v2_tap; struct lightbar_params_v2_oscillation get_params_v2_osc; @@ -2815,7 +2808,6 @@ struct ec_params_motion_sense { uint16_t scale[3]; } sensor_scale; - /* Used for MOTIONSENSE_CMD_FIFO_INFO */ /* (no params) */ @@ -3272,7 +3264,6 @@ struct ec_response_thermal_get_threshold { uint16_t value; } __ec_align2; - /* The version 1 structs are visible. */ enum ec_temp_thresholds { EC_TEMP_THRESH_WARN = 0, @@ -3388,7 +3379,6 @@ struct ec_params_tmp006_set_calibration_v1 { float val[0]; } __ec_align4; - /* Read raw TMP006 data */ #define EC_CMD_TMP006_GET_RAW 0x0055 @@ -3786,7 +3776,6 @@ struct ec_response_keyboard_factory_test { #define EC_MKBP_FP_ERR_MATCH_YES_UPDATED 3 #define EC_MKBP_FP_ERR_MATCH_YES_UPDATE_FAILED 5 - #define EC_CMD_MKBP_WAKE_MASK 0x0069 enum ec_mkbp_event_mask_action { /* Retrieve the value of a wake mask. */ @@ -3864,7 +3853,6 @@ struct ec_response_temp_sensor_get_info { /*****************************************************************************/ /* Host event commands */ - /* Obsolete. New implementation should use EC_CMD_HOST_EVENT instead */ /* * Host event mask params and response structures, shared by all of the host @@ -4461,7 +4449,6 @@ struct ec_response_charge_state { }; } __ec_align4; - /* * Set maximum battery charging current. */ @@ -4790,7 +4777,6 @@ struct ec_response_i2c_passthru_protect { uint8_t status; /* Status flags (0: unlocked, 1: locked) */ } __ec_align1; - /*****************************************************************************/ /* * HDMI CEC commands @@ -5400,7 +5386,6 @@ struct ec_response_usb_pd_power_info { uint32_t max_power; } __ec_align4; - /* * This command will return the number of USB PD charge port + the number * of dedicated port present. @@ -5602,7 +5587,6 @@ struct ec_params_pd_write_log_entry { uint8_t port; /* port#, or 0 for events unrelated to a given port */ } __ec_align1; - /* Control USB-PD chip */ #define EC_CMD_PD_CONTROL 0x0119 @@ -5886,7 +5870,6 @@ struct ec_response_rollback_info { int32_t rw_rollback_version; } __ec_align4; - /* Issue AP reset */ #define EC_CMD_AP_RESET 0x0125 @@ -5928,7 +5911,6 @@ struct ec_params_locate_chip { }; } __ec_align2; - struct ec_response_locate_chip { uint8_t bus_type; /* enum ec_bus_type */ uint8_t reserved; /* Aligning the following union to 2 bytes */ diff --git a/src/ec/google/chromeec/ec_lpc.c b/src/ec/google/chromeec/ec_lpc.c index 5306dcca5b..b9c972834b 100644 --- a/src/ec/google/chromeec/ec_lpc.c +++ b/src/ec/google/chromeec/ec_lpc.c @@ -307,7 +307,6 @@ static int google_chromeec_command_v1(struct chromeec_command *cec_command) args.checksum = csum; write_bytes(EC_LPC_ADDR_HOST_ARGS, sizeof(args), (u8*)&args, NULL); - /* Issue the command */ write_byte(cmd_code, EC_LPC_ADDR_HOST_CMD); diff --git a/src/ec/lenovo/h8/h8.h b/src/ec/lenovo/h8/h8.h index b1ad5ac65b..40816117b1 100644 --- a/src/ec/lenovo/h8/h8.h +++ b/src/ec/lenovo/h8/h8.h @@ -40,7 +40,6 @@ void h8_ssdt_generator(const struct device *dev); */ void h8_mb_init(void); - /* EC registers */ #define H8_CONFIG0 0x00 #define H8_CONFIG0_EVENTS_ENABLE 0x02 diff --git a/src/ec/quanta/ene_kb3940q/ec.c b/src/ec/quanta/ene_kb3940q/ec.c index 532060f8a1..c7b934877c 100644 --- a/src/ec/quanta/ene_kb3940q/ec.c +++ b/src/ec/quanta/ene_kb3940q/ec.c @@ -26,7 +26,6 @@ static int ec_input_buffer_empty(u8 status_port) return !!timeout; } - static int ec_output_buffer_full(u8 status_port) { u32 timeout; @@ -41,8 +40,6 @@ static int ec_output_buffer_full(u8 status_port) return !!timeout; } - - /* The ENE 60/64 EC registers are the same command/status IB/OB KBC pair. * Check status from 64 port before each command. * diff --git a/src/ec/quanta/ene_kb3940q/ec.h b/src/ec/quanta/ene_kb3940q/ec.h index dafafa7992..d354048eb0 100644 --- a/src/ec/quanta/ene_kb3940q/ec.h +++ b/src/ec/quanta/ene_kb3940q/ec.h @@ -12,8 +12,6 @@ #define EC_IO_LOW EC_IO + 2 #define EC_IO_DATA EC_IO + 3 - - // 60h/64h Command Interface #define KBD_DATA 0x60 #define KBD_COMMAND 0x64 @@ -192,5 +190,4 @@ void ec_mem_write(u8 addr, u8 data); #define EC_CMD_BURST_DISABLE 0x83 #define EC_CMD_QUERY_EVENT 0x84 - #endif /* _EC_QUANTA_ENE_KB3940Q_EC_H */ diff --git a/src/ec/quanta/it8518/ec.c b/src/ec/quanta/it8518/ec.c index 949f93dc75..80aaa5dd12 100644 --- a/src/ec/quanta/it8518/ec.c +++ b/src/ec/quanta/it8518/ec.c @@ -26,7 +26,6 @@ static int input_buffer_empty(u16 status_reg) return !!timeout; } - static int output_buffer_full(u16 status_reg) { u32 timeout; @@ -42,8 +41,6 @@ static int output_buffer_full(u16 status_reg) return !!timeout; } - - /* The IT8518 60/64 EC registers are the same command/status IB/OB KBC pair. * Check status from 64 port before each command. * @@ -73,7 +70,6 @@ void ec_kbc_write_ib(u8 data) outb(data, KBD_DATA); } - /* * These functions are for accessing the IT8518 device RAM space via 0x66/0x68 */ @@ -110,7 +106,6 @@ void ec_write(u16 addr, u8 data) ec_write_ib(data); } - u8 ec_it8518_get_event(void) { u8 cmd = 0; diff --git a/src/ec/quanta/it8518/ec.h b/src/ec/quanta/it8518/ec.h index 4dcf1580c3..5645062bcc 100644 --- a/src/ec/quanta/it8518/ec.h +++ b/src/ec/quanta/it8518/ec.h @@ -58,7 +58,6 @@ void ec_kbc_write_ib(u8 data); #define EC_IF_MAJ_VER 0xEF #define EC_MBAT_STATUS 0x0138 - // EC 0.83b added status bits: // BIT0=EC in RO mode // BIT1=Recovery Key Sequence Detected |