summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorFurquan Shaikh <furquan@google.com>2020-06-03 16:50:32 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-06-06 09:44:39 +0000
commitb07e262c48eb964617c4413a88c37f0db31805b6 (patch)
tree7e97d8394f48b7ffd1460c3e09e1ce71dea0748e /src
parent071182ade30da4bdba6da03ce79abf8df91ee480 (diff)
downloadcoreboot-b07e262c48eb964617c4413a88c37f0db31805b6.tar.xz
soc/amd/picasso: Add device operations for UART MMIO devices
This change adds device_operations for UART MMIO devices that provides following operations: 1. uart_acpi_name: Returns ACPI name of UART device. Generation of UART device node is not yet moved to SSDT, but will be done in follow-up CLs. 2. scan_bus: Uses scan_static_bus to scan devices added under the UART devices. This allows mainboard to add devices under the UART MMIO device. Change-Id: I18abbe88952e7006668657eb1d0c177e53e95850 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42068 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/amd/picasso/chip.c8
-rw-r--r--src/soc/amd/picasso/uart.c23
2 files changed, 31 insertions, 0 deletions
diff --git a/src/soc/amd/picasso/chip.c b/src/soc/amd/picasso/chip.c
index d364b9a88c..2e5fae58e5 100644
--- a/src/soc/amd/picasso/chip.c
+++ b/src/soc/amd/picasso/chip.c
@@ -15,6 +15,8 @@
/* Supplied by i2c.c */
extern struct device_operations picasso_i2c_mmio_ops;
+/* Supplied by uart.c */
+extern struct device_operations picasso_uart_mmio_ops;
struct device_operations cpu_bus_ops = {
.read_resources = noop_read_resources,
@@ -126,6 +128,12 @@ static void set_mmio_dev_ops(struct device *dev)
case APU_I2C4_BASE:
dev->ops = &picasso_i2c_mmio_ops;
break;
+ case APU_UART0_BASE:
+ case APU_UART1_BASE:
+ case APU_UART2_BASE:
+ case APU_UART3_BASE:
+ dev->ops = &picasso_uart_mmio_ops;
+ break;
}
}
diff --git a/src/soc/amd/picasso/uart.c b/src/soc/amd/picasso/uart.c
index 6ae79b9524..b1331ec603 100644
--- a/src/soc/amd/picasso/uart.c
+++ b/src/soc/amd/picasso/uart.c
@@ -74,3 +74,26 @@ unsigned int uart_platform_refclk(void)
{
return CONFIG(PICASSO_UART_48MZ) ? 48000000 : 115200 * 16;
}
+
+static const char *uart_acpi_name(const struct device *dev)
+{
+ switch (dev->path.mmio.addr) {
+ case APU_UART0_BASE:
+ return "FUR0";
+ case APU_UART1_BASE:
+ return "FUR1";
+ case APU_UART2_BASE:
+ return "FUR2";
+ case APU_UART3_BASE:
+ return "FUR3";
+ default:
+ return NULL;
+ }
+}
+
+struct device_operations picasso_uart_mmio_ops = {
+ .read_resources = noop_read_resources,
+ .set_resources = noop_set_resources,
+ .scan_bus = scan_static_bus,
+ .acpi_name = uart_acpi_name,
+};