diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-06-18 14:05:35 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-22 11:45:41 +0000 |
| commit | b486f29a4452227c3dd9ee676eda41775afd8b96 (patch) | |
| tree | 2d7edd46899d7d94923daa7643b0005d0e5df913 /src | |
| parent | 933f90147b63be04e985db7784d80f32faec08c9 (diff) | |
| download | coreboot-b486f29a4452227c3dd9ee676eda41775afd8b96.tar.xz | |
cpu/x86/smm: Define APM_CNT_ROUTE_ALL_XHCI
Change-Id: I0bc321f499278e0cdbfb40be9a2b2ae21828d2f4
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42619
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/include/cpu/x86/smm.h | 1 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/smihandler.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/usb_xhci.c | 4 |
3 files changed, 4 insertions, 3 deletions
diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h index 513b6df708..9db1461d9d 100644 --- a/src/include/cpu/x86/smm.h +++ b/src/include/cpu/x86/smm.h @@ -24,6 +24,7 @@ #define APM_CNT_ACPI_ENABLE 0xe1 #define APM_CNT_MBI_UPDATE 0xeb #define APM_CNT_GNVS_UPDATE 0xea +#define APM_CNT_ROUTE_ALL_XHCI 0xca #define APM_CNT_FINALIZE 0xcb #define APM_CNT_LEGACY 0xcc #define APM_CNT_SMMINFO 0xec diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c index 8bbe3feaa4..be842c5720 100644 --- a/src/southbridge/intel/lynxpoint/smihandler.c +++ b/src/southbridge/intel/lynxpoint/smihandler.c @@ -330,7 +330,7 @@ static void southbridge_smi_apmc(void) printk(BIOS_DEBUG, "SMI#: Setting GNVS to %p\n", gnvs); } break; - case 0xca: + case APM_CNT_ROUTE_ALL_XHCI: usb_xhci_route_all(); break; case APM_CNT_ELOG_GSMI: diff --git a/src/southbridge/intel/lynxpoint/usb_xhci.c b/src/southbridge/intel/lynxpoint/usb_xhci.c index 8684aa9b32..1cfec1b476 100644 --- a/src/southbridge/intel/lynxpoint/usb_xhci.c +++ b/src/southbridge/intel/lynxpoint/usb_xhci.c @@ -1,10 +1,10 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <cpu/x86/smm.h> #include <delay.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <arch/io.h> #include <device/mmio.h> #include <device/pci_ops.h> #include "chip.h" @@ -356,7 +356,7 @@ static void usb_xhci_init(struct device *dev) usb_xhci_reset_usb3(dev, 0); } else if (config->xhci_default) { /* Route all ports to XHCI */ - outb(0xca, 0xb2); + apm_control(APM_CNT_ROUTE_ALL_XHCI); } } |