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authorArthur Heymans <arthur@aheymans.xyz>2017-09-25 12:47:41 +0200
committerMartin Roth <martinroth@google.com>2017-12-20 16:53:30 +0000
commitb5d4dd132cbf241b5721897053f802807578c168 (patch)
treeb5eed99dae38a8ab69a9c15a33642805f28df83f /src
parente07e39098aaac1c0be80bae6447b04de530da949 (diff)
downloadcoreboot-b5d4dd132cbf241b5721897053f802807578c168.tar.xz
device/dram/ddr2.c: Store the checksum in the decoded SPD struct
Change-Id: I53f4a3e4030ea19e10c0fe11a99a3480644f5fae Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/21676 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src')
-rw-r--r--src/device/dram/ddr2.c1
-rw-r--r--src/include/device/dram/ddr2.h1
2 files changed, 2 insertions, 0 deletions
diff --git a/src/device/dram/ddr2.c b/src/device/dram/ddr2.c
index e06e3423a8..0117b93d06 100644
--- a/src/device/dram/ddr2.c
+++ b/src/device/dram/ddr2.c
@@ -322,6 +322,7 @@ int spd_decode_ddr2(struct dimm_attr_st *dimm, u8 spd[SPD_SIZE_MAX_DDR2])
dimm->dram_type = SPD_MEMORY_TYPE_UNDEFINED;
return SPD_STATUS_CRC_ERROR;
}
+ dimm->checksum = spd[63];
reg8 = spd[62];
if ((reg8 & 0xf0) != 0x10) {
diff --git a/src/include/device/dram/ddr2.h b/src/include/device/dram/ddr2.h
index 288c10298a..7322b122a7 100644
--- a/src/include/device/dram/ddr2.h
+++ b/src/include/device/dram/ddr2.h
@@ -186,6 +186,7 @@ struct dimm_attr_st {
u32 tPLL;
u32 tRR;
+ u8 checksum;
/* Manufacturer ID */
u32 manufacturer_id;
/* ASCII part number - NULL terminated */