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authorStefan Reinauer <stepan@coresystems.de>2010-01-16 13:47:07 +0000
committerStefan Reinauer <stepan@openbios.org>2010-01-16 13:47:07 +0000
commitba8b21c37638837a2afbb95c056b9ce6c25366bd (patch)
treec752c6ddb86a54bf1b4911a5d169fc8242310e87 /src
parent68b3c4637a32004c956dd89d01d2288aff2f24d2 (diff)
downloadcoreboot-ba8b21c37638837a2afbb95c056b9ce6c25366bd.tar.xz
Micro-optimization: movl $0 --> xorl.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5012 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r--src/cpu/intel/model_106cx/cache_as_ram.inc6
-rw-r--r--src/cpu/intel/model_106cx/cache_as_ram_post.c4
2 files changed, 5 insertions, 5 deletions
diff --git a/src/cpu/intel/model_106cx/cache_as_ram.inc b/src/cpu/intel/model_106cx/cache_as_ram.inc
index dec09fee65..2d36eac67f 100644
--- a/src/cpu/intel/model_106cx/cache_as_ram.inc
+++ b/src/cpu/intel/model_106cx/cache_as_ram.inc
@@ -71,7 +71,7 @@ clear_mtrrs:
/* Set cache as ram mask */
movl $(MTRRphysMask_MSR(0)), %ecx
movl $(~((CACHE_AS_RAM_SIZE-1)) | (1 << 11)), %eax
- movl $0x00000000, %edx
+ xorl %edx, %edx
wrmsr
post_code(0x25)
@@ -113,7 +113,7 @@ clear_mtrrs:
#if defined(CONFIG_XIP_ROM_SIZE) && defined(CONFIG_XIP_ROM_BASE)
/* Enable cache for our code in Flash because we do XIP here */
movl $MTRRphysBase_MSR(1), %ecx
- xorl %edx, %edx
+ xorl %edx, %edx
#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
#define REAL_XIP_ROM_BASE AUTO_XIP_ROM_BASE
#else
@@ -124,7 +124,7 @@ clear_mtrrs:
wrmsr
movl $MTRRphysMask_MSR(1), %ecx
- movl $0x00000000, %edx
+ xorl %edx, %edx
movl $(~(CONFIG_XIP_ROM_SIZE - 1) | 0x800), %eax
wrmsr
#endif /* CONFIG_XIP_ROM_SIZE && CONFIG_XIP_ROM_BASE */
diff --git a/src/cpu/intel/model_106cx/cache_as_ram_post.c b/src/cpu/intel/model_106cx/cache_as_ram_post.c
index 09446fdea1..f4ced0f845 100644
--- a/src/cpu/intel/model_106cx/cache_as_ram_post.c
+++ b/src/cpu/intel/model_106cx/cache_as_ram_post.c
@@ -60,7 +60,7 @@
"wrmsr\n"
"movl $MTRRphysMask_MSR(0), %ecx\n"
"movl $(~(1024*1024 -1) | (1 << 11)), %eax\n"
- "movl $0x00000000, %edx\n"
+ "xorl %edx, %edx\n"
"wrmsr\n"
"movb $0x35, %al\noutb %al, $0x80\n"
#endif
@@ -97,7 +97,7 @@
"wrmsr\n"
"movl $MTRRphysMask_MSR(0), %ecx\n"
"movl $(~(1024*1024 -1) | (1 << 11)), %eax\n"
- "movl $0x00000000, %edx\n"
+ "xorl %edx, %edx\n"
"wrmsr\n"
"movb $0x39, %al\noutb %al, $0x80\n"