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authorDamien Zammit <damien@zamaudio.com>2014-10-29 08:58:28 +1100
committerEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-11-02 03:37:12 +0100
commitbf30ae63a9cf747aea8eebc7568d404e8b132c75 (patch)
tree330eb9b44bd8aaa66f2c0ff9d46279a0a1b1aae6 /src
parent49c70b6182ffbc71368148b2b449883a0e6cc89c (diff)
downloadcoreboot-bf30ae63a9cf747aea8eebc7568d404e8b132c75.tar.xz
intel/bd82x6x: Add new current for native USB ports
Change-Id: I88ef36b94b961a318d280d8de1b8721fcbeb93b0 Signed-off-by: Damien Zammit <damien@zamaudio.com> Reviewed-on: http://review.coreboot.org/7237 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src')
-rw-r--r--src/southbridge/intel/bd82x6x/early_usb_native.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/bd82x6x/early_usb_native.c b/src/southbridge/intel/bd82x6x/early_usb_native.c
index 7ce55742e5..b1f84471c0 100644
--- a/src/southbridge/intel/bd82x6x/early_usb_native.c
+++ b/src/southbridge/intel/bd82x6x/early_usb_native.c
@@ -33,7 +33,7 @@ early_usb_init (const struct southbridge_usb_port *portmap)
/* 3560 */ 0x024c8001, 0x000024a3, 0x00040002, 0x01000050,
/* 3570 */ 0x02000772, 0x16000f9f, 0x1800ff4f, 0x0001d630,
};
- const u32 currents[] = { 0x20000153, 0x20000f57, 0x2000055b, 0x20000f51 , 0x2000094a };
+ const u32 currents[] = { 0x20000153, 0x20000f57, 0x2000055b, 0x20000f51 , 0x2000094a, 0x2000035f };
int i;
/* Activate PMBAR. */
pci_write_config32(PCI_DEV(0, 0x1f, 0), PMBASE, DEFAULT_PMBASE | 1);