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| author | Angel Pons <th3fanbus@gmail.com> | 2020-06-01 20:21:26 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-21 18:23:15 +0000 |
| commit | c274be5fc4a608f7de1dfa7c28a0db4412855da1 (patch) | |
| tree | 0eb8d1be547133124fa6f2de86ca0f6a490ff471 /src | |
| parent | 64285775a05bd00cd3e7d606f92ab4bad0149979 (diff) | |
| download | coreboot-c274be5fc4a608f7de1dfa7c28a0db4412855da1.tar.xz | |
x4x/i82801jx: Use common code for early SMBus
The early SMBus code for this chipset was not checking the vendor ID
before. It is assumed that adding this check does not pose a problem.
Change-Id: I0c36c8cd8aca8db860b1edafd29d4f2dbaa2c822
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42003
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/southbridge/intel/i82801jx/Kconfig | 1 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801jx/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/southbridge/intel/i82801jx/early_smbus.c | 29 |
3 files changed, 1 insertions, 30 deletions
diff --git a/src/southbridge/intel/i82801jx/Kconfig b/src/southbridge/intel/i82801jx/Kconfig index c79b3682e8..6abeac1f49 100644 --- a/src/southbridge/intel/i82801jx/Kconfig +++ b/src/southbridge/intel/i82801jx/Kconfig @@ -16,6 +16,7 @@ config SOUTHBRIDGE_INTEL_I82801JX select SOUTHBRIDGE_INTEL_COMMON_RESET select SOUTHBRIDGE_INTEL_COMMON_RTC select SOUTHBRIDGE_INTEL_COMMON_SMBUS + select SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SMM select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9 select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG diff --git a/src/southbridge/intel/i82801jx/Makefile.inc b/src/southbridge/intel/i82801jx/Makefile.inc index 8edbf4f8a2..0bc3b009a3 100644 --- a/src/southbridge/intel/i82801jx/Makefile.inc +++ b/src/southbridge/intel/i82801jx/Makefile.inc @@ -6,7 +6,6 @@ bootblock-y += bootblock.c bootblock-y += early_init.c romstage-y += early_init.c -romstage-y += early_smbus.c ramstage-y += fadt.c ramstage-y += hdaudio.c diff --git a/src/southbridge/intel/i82801jx/early_smbus.c b/src/southbridge/intel/i82801jx/early_smbus.c deleted file mode 100644 index c4b82bbf9e..0000000000 --- a/src/southbridge/intel/i82801jx/early_smbus.c +++ /dev/null @@ -1,29 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <device/pci_ops.h> -#include <device/pci_def.h> -#include <device/smbus_host.h> -#include "i82801jx.h" - -uintptr_t smbus_base(void) -{ - return CONFIG_FIXED_SMBUS_IO_BASE; -} - -int smbus_enable_iobar(uintptr_t base) -{ - /* Set the SMBus device statically. */ - pci_devfn_t dev = PCI_DEV(0x0, 0x1f, 0x3); - - /* Set SMBus I/O base. */ - pci_write_config32(dev, SMB_BASE, - base | PCI_BASE_ADDRESS_SPACE_IO); - - /* Set SMBus enable. */ - pci_write_config8(dev, HOSTC, HST_EN); - - /* Set SMBus I/O space enable. */ - pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_IO); - - return 0; -} |