diff options
| author | Patrick Georgi <pgeorgi@chromium.org> | 2015-06-22 21:10:34 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-06-23 21:19:02 +0200 |
| commit | c32a52c200f115cd910188cfd91438b11e58fcb1 (patch) | |
| tree | 98290b0bc1db0652ca6226a253ce2f28748b8af8 /src | |
| parent | edae744467297aa31e0ff994864ec0a68434758f (diff) | |
| download | coreboot-c32a52c200f115cd910188cfd91438b11e58fcb1.tar.xz | |
acpi: bring back ability to link DSDT into ramstage
Bring back the ability to link in the DSDT. This is to help Chrome OS to
switch over to a new upstream quickly (because some of the custom built
mechanisms are a pain with tons of files).
This is supposed to be temporary (famous last words), but I'd rather fix the
lack of CBFS awareness in CrOS bit for good in the time I usually spend on
keeping upstream and CrOS branches close.
Change-Id: I7fa5540bbf5c568c4adca56a09c83b6c7e358ad5
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10637
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/x86/Kconfig | 4 | ||||
| -rw-r--r-- | src/arch/x86/Makefile.inc | 17 | ||||
| -rw-r--r-- | src/arch/x86/boot/acpi.c | 7 |
3 files changed, 28 insertions, 0 deletions
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 1e35846087..88b259297c 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -134,3 +134,7 @@ config HPET_ADDRESS config ID_SECTION_OFFSET hex default 0x80 + +config COMPILE_IN_DSDT + bool "compile in DSDT and use that over DSDT in CBFS" + default n diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 02c29c4483..eaab2de96c 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -245,6 +245,23 @@ endif # CONFIG_ARCH_ROMSTAGE_X86_32 / CONFIG_ARCH_ROMSTAGE_X86_64 ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32)$(CONFIG_ARCH_RAMSTAGE_X86_64),y) +ifeq ($(CONFIG_COMPILE_IN_DSDT),y) +ramstage-srcs += $(obj)/dsdt.aml + +ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y) +target-objcopy=-O elf32-i386 -B i386 +endif +ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_64),y) +target-objcopy=-O elf64-x86_64 -B x86_64 +endif + +define ramstage-objs_aml_template +$(call src-to-obj,ramstage,$(1).aml): $(1).aml + @printf " OBJCOPY $$(subst $$(obj)/,,$$(@))\n" + cd $$(dir $$@) && $$(OBJCOPY_ramstage) -I binary $$(target-objcopy) $$(notdir $$<) $$(notdir $$@) +endef +endif + ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c) ifeq ($(CONFIG_GENERATE_MP_TABLE),y) ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/mptable.c),) diff --git a/src/arch/x86/boot/acpi.c b/src/arch/x86/boot/acpi.c index 208411edba..cf33e40ff3 100644 --- a/src/arch/x86/boot/acpi.c +++ b/src/arch/x86/boot/acpi.c @@ -757,9 +757,16 @@ unsigned long write_acpi_tables(unsigned long start) if (fw) return fw; +#if CONFIG_COMPILE_IN_DSDT + extern char _binary_dsdt_aml_start; + extern char _binary_dsdt_aml_end; + dsdt_file = (acpi_header_t *)&_binary_dsdt_aml_start; + dsdt_size = (size_t)(&_binary_dsdt_aml_end - &_binary_dsdt_aml_start); +#else dsdt_file = cbfs_boot_map_with_leak( CONFIG_CBFS_PREFIX "/dsdt.aml", CBFS_TYPE_RAW, &dsdt_size); +#endif if (!dsdt_file) { printk(BIOS_ERR, "No DSDT file, skipping ACPI tables\n"); return current; |