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| author | Patrick Georgi <patrick@georgi-clan.de> | 2011-03-04 17:09:21 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2011-03-04 17:09:21 +0000 |
| commit | c9a08ddafdc647447d59f91e41b8e32493eb8c03 (patch) | |
| tree | 300b50768fc6c228c7512973d54fb44bb7e2e414 /src | |
| parent | d5782f3588f402124a2659e9027f249a8eceb7c2 (diff) | |
| download | coreboot-c9a08ddafdc647447d59f91e41b8e32493eb8c03.tar.xz | |
Redo r6099 after copy&pasted code reintroduced DIMMx #defines
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6431 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/amd/bimini_fam10/romstage.c | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/src/mainboard/amd/bimini_fam10/romstage.c b/src/mainboard/amd/bimini_fam10/romstage.c index 7bd4ddd08b..e3955748b5 100644 --- a/src/mainboard/amd/bimini_fam10/romstage.c +++ b/src/mainboard/amd/bimini_fam10/romstage.c @@ -49,6 +49,7 @@ #include "southbridge/amd/rs780/early_setup.c" #include "southbridge/amd/sb800/early_setup.c" #include "northbridge/amd/amdfam10/debug.c" +#include <spd.h> static void activate_spd_rom(const struct mem_controller *ctrl) { @@ -77,11 +78,6 @@ static int spd_read_byte(u32 device, u32 address) #define RC00 0 #define RC01 1 -#define DIMM0 0x50 -#define DIMM1 0x51 -#define DIMM2 0x52 -#define DIMM3 0x53 - void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); |