summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-03-01 13:43:02 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-03-01 20:32:15 +0000
commitf1b58b78351d7ed220673e688a2f7bc9e96da4e2 (patch)
treed8aae223f0e426f189cb4750b972a31e09d46b88 /src
parent44e89af6e609874f2f18d30f1e66dce8b5a98eff (diff)
downloadcoreboot-f1b58b78351d7ed220673e688a2f7bc9e96da4e2.tar.xz
device/pci: Fix PCI accessor headers
PCI config accessors are no longer indirectly included from <arch/io.h> use <device/pci_ops.h> instead. Change-Id: I2adf46430a33bc52ef69d1bf7dca4655fc8475bd Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31675 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src')
-rw-r--r--src/arch/x86/include/arch/io.h4
-rw-r--r--src/commonlib/storage/pci_sdhci.c1
-rw-r--r--src/cpu/amd/family_10h-family_15h/init_cpus.c1
-rw-r--r--src/cpu/amd/family_10h-family_15h/model_10xxx_init.c1
-rw-r--r--src/cpu/amd/family_10h-family_15h/monotonic_timer.c1
-rw-r--r--src/cpu/amd/family_10h-family_15h/powernow_acpi.c1
-rw-r--r--src/cpu/amd/family_10h-family_15h/ram_calc.c1
-rw-r--r--src/cpu/amd/quadcore/amd_sibling.c1
-rw-r--r--src/cpu/amd/quadcore/quadcore.c1
-rw-r--r--src/cpu/amd/quadcore/quadcore_id.c1
-rw-r--r--src/cpu/intel/fsp_model_406dx/bootblock.c1
-rw-r--r--src/device/cardbus_device.c1
-rw-r--r--src/device/hypertransport.c1
-rw-r--r--src/device/pci_class.c1
-rw-r--r--src/device/pci_device.c1
-rw-r--r--src/device/pcix_device.c1
-rw-r--r--src/drivers/dec/21143/21143.c1
-rw-r--r--src/drivers/generic/bayhub/bh720.c1
-rw-r--r--src/drivers/intel/gma/vbt.c1
-rw-r--r--src/drivers/intel/wifi/wifi.c1
-rw-r--r--src/drivers/net/atl1e.c1
-rw-r--r--src/drivers/ricoh/rce822/rce822.c1
-rw-r--r--src/drivers/uart/oxpcie.c1
-rw-r--r--src/drivers/uart/oxpcie_early.c1
-rw-r--r--src/drivers/usb/pci_ehci.c1
-rw-r--r--src/include/device/pci.h1
-rw-r--r--src/include/device/pci_ops.h4
-rw-r--r--src/lib/reg_script.c1
-rw-r--r--src/mainboard/adi/rcc-dff/romstage.c1
-rw-r--r--src/mainboard/advansus/a785e-i/romstage.c1
-rw-r--r--src/mainboard/amd/bimini_fam10/romstage.c1
-rw-r--r--src/mainboard/amd/mahogany_fam10/mainboard.c1
-rw-r--r--src/mainboard/amd/mahogany_fam10/mptable.c1
-rw-r--r--src/mainboard/amd/olivehill/romstage.c1
-rw-r--r--src/mainboard/amd/parmer/romstage.c1
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c1
-rw-r--r--src/mainboard/amd/thatcher/romstage.c1
-rw-r--r--src/mainboard/amd/tilapia_fam10/mainboard.c1
-rw-r--r--src/mainboard/amd/tilapia_fam10/mptable.c1
-rw-r--r--src/mainboard/aopen/dxplplusu/fadt.c1
-rw-r--r--src/mainboard/apple/macbook21/romstage.c1
-rw-r--r--src/mainboard/apple/macbookair4_2/romstage.c1
-rw-r--r--src/mainboard/asrock/b75pro3-m/romstage.c1
-rw-r--r--src/mainboard/asrock/g41c-gs/romstage.c1
-rw-r--r--src/mainboard/asrock/imb-a180/romstage.c1
-rw-r--r--src/mainboard/asus/am1i-a/romstage.c1
-rw-r--r--src/mainboard/asus/f2a85-m/romstage.c1
-rw-r--r--src/mainboard/asus/h61m-cs/romstage.c1
-rw-r--r--src/mainboard/asus/kcma-d8/acpi_tables.c1
-rw-r--r--src/mainboard/asus/kcma-d8/bootblock.c1
-rw-r--r--src/mainboard/asus/kcma-d8/mainboard.c1
-rw-r--r--src/mainboard/asus/kcma-d8/mptable.c1
-rw-r--r--src/mainboard/asus/kcma-d8/romstage.c1
-rw-r--r--src/mainboard/asus/kfsn4-dre/acpi_tables.c1
-rw-r--r--src/mainboard/asus/kfsn4-dre/get_bus_conf.c1
-rw-r--r--src/mainboard/asus/kfsn4-dre/mptable.c1
-rw-r--r--src/mainboard/asus/kfsn4-dre/romstage.c1
-rw-r--r--src/mainboard/asus/kgpe-d16/acpi_tables.c1
-rw-r--r--src/mainboard/asus/kgpe-d16/bootblock.c1
-rw-r--r--src/mainboard/asus/kgpe-d16/mainboard.c1
-rw-r--r--src/mainboard/asus/kgpe-d16/mptable.c1
-rw-r--r--src/mainboard/asus/kgpe-d16/romstage.c1
-rw-r--r--src/mainboard/asus/m4a78-em/mainboard.c1
-rw-r--r--src/mainboard/asus/m4a78-em/mptable.c1
-rw-r--r--src/mainboard/asus/m4a785-m/mainboard.c1
-rw-r--r--src/mainboard/asus/m4a785-m/mptable.c1
-rw-r--r--src/mainboard/asus/m5a88-v/romstage.c1
-rw-r--r--src/mainboard/asus/p5gc-mx/romstage.c1
-rw-r--r--src/mainboard/asus/p5qc/romstage.c1
-rw-r--r--src/mainboard/asus/p5qpl-am/romstage.c1
-rw-r--r--src/mainboard/asus/p8h61-m_pro/romstage.c1
-rw-r--r--src/mainboard/avalue/eax-785e/romstage.c1
-rw-r--r--src/mainboard/bap/ode_e20XX/romstage.c1
-rw-r--r--src/mainboard/biostar/a68n_5200/romstage.c1
-rw-r--r--src/mainboard/biostar/am1ml/romstage.c1
-rw-r--r--src/mainboard/compulab/intense_pc/romstage.c1
-rw-r--r--src/mainboard/emulation/qemu-i440fx/northbridge.c1
-rw-r--r--src/mainboard/emulation/qemu-q35/acpi_tables.c1
-rw-r--r--src/mainboard/emulation/qemu-q35/bootblock.c1
-rw-r--r--src/mainboard/foxconn/d41s/romstage.c1
-rw-r--r--src/mainboard/foxconn/g41s-k/romstage.c1
-rw-r--r--src/mainboard/getac/p470/mainboard.c1
-rw-r--r--src/mainboard/getac/p470/romstage.c1
-rw-r--r--src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c1
-rw-r--r--src/mainboard/gigabyte/ga-b75m-d3h/romstage.c1
-rw-r--r--src/mainboard/gigabyte/ga-b75m-d3v/romstage.c1
-rw-r--r--src/mainboard/gigabyte/ga-g41m-es2l/romstage.c1
-rw-r--r--src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c1
-rw-r--r--src/mainboard/gigabyte/ma785gm/mainboard.c1
-rw-r--r--src/mainboard/gigabyte/ma785gm/mptable.c1
-rw-r--r--src/mainboard/gigabyte/ma785gmt/mainboard.c1
-rw-r--r--src/mainboard/gigabyte/ma785gmt/mptable.c1
-rw-r--r--src/mainboard/gigabyte/ma78gm/mainboard.c1
-rw-r--r--src/mainboard/gigabyte/ma78gm/mptable.c1
-rw-r--r--src/mainboard/gizmosphere/gizmo2/romstage.c1
-rw-r--r--src/mainboard/google/auron/variants/buddy/variant.c1
-rw-r--r--src/mainboard/google/beltino/chromeos.c1
-rw-r--r--src/mainboard/google/beltino/lan.c1
-rw-r--r--src/mainboard/google/butterfly/chromeos.c1
-rw-r--r--src/mainboard/google/butterfly/romstage.c1
-rw-r--r--src/mainboard/google/cyan/com_init.c1
-rw-r--r--src/mainboard/google/jecht/chromeos.c1
-rw-r--r--src/mainboard/google/jecht/lan.c1
-rw-r--r--src/mainboard/google/kahlee/variants/baseboard/mainboard.c1
-rw-r--r--src/mainboard/google/link/romstage.c1
-rw-r--r--src/mainboard/google/parrot/chromeos.c1
-rw-r--r--src/mainboard/google/parrot/romstage.c1
-rw-r--r--src/mainboard/google/poppy/variants/nautilus/mainboard.c1
-rw-r--r--src/mainboard/google/rambi/variants/ninja/lan.c1
-rw-r--r--src/mainboard/google/rambi/variants/sumo/lan.c1
-rw-r--r--src/mainboard/google/stout/chromeos.c1
-rw-r--r--src/mainboard/google/stout/mainboard_smi.c1
-rw-r--r--src/mainboard/google/stout/romstage.c1
-rw-r--r--src/mainboard/hp/2570p/romstage.c1
-rw-r--r--src/mainboard/hp/2760p/romstage.c1
-rw-r--r--src/mainboard/hp/8460p/romstage.c1
-rw-r--r--src/mainboard/hp/8470p/romstage.c1
-rw-r--r--src/mainboard/hp/8770w/romstage.c1
-rw-r--r--src/mainboard/hp/abm/romstage.c1
-rw-r--r--src/mainboard/hp/compaq_8200_elite_sff/romstage.c1
-rw-r--r--src/mainboard/hp/dl165_g6_fam10/get_bus_conf.c1
-rw-r--r--src/mainboard/hp/dl165_g6_fam10/mptable.c1
-rw-r--r--src/mainboard/hp/dl165_g6_fam10/romstage.c1
-rw-r--r--src/mainboard/hp/folio_9470m/romstage.c1
-rw-r--r--src/mainboard/hp/revolve_810_g1/romstage.c1
-rw-r--r--src/mainboard/ibase/mb899/romstage.c1
-rw-r--r--src/mainboard/iei/kino-780am2-fam10/mptable.c1
-rw-r--r--src/mainboard/intel/baskingridge/chromeos.c1
-rw-r--r--src/mainboard/intel/d510mo/romstage.c1
-rw-r--r--src/mainboard/intel/d945gclf/romstage.c1
-rw-r--r--src/mainboard/intel/dcp847ske/early_southbridge.c1
-rw-r--r--src/mainboard/intel/dg41wv/romstage.c1
-rw-r--r--src/mainboard/intel/dg43gt/romstage.c1
-rw-r--r--src/mainboard/intel/emeraldlake2/chromeos.c1
-rw-r--r--src/mainboard/intel/emeraldlake2/romstage.c1
-rw-r--r--src/mainboard/intel/littleplains/romstage.c1
-rw-r--r--src/mainboard/intel/mohonpeak/romstage.c1
-rw-r--r--src/mainboard/intel/strago/com_init.c1
-rw-r--r--src/mainboard/jetway/pa78vm5/mainboard.c1
-rw-r--r--src/mainboard/jetway/pa78vm5/mptable.c1
-rw-r--r--src/mainboard/kontron/986lcd-m/romstage.c1
-rw-r--r--src/mainboard/kontron/ktqm77/romstage.c1
-rw-r--r--src/mainboard/lenovo/l520/romstage.c1
-rw-r--r--src/mainboard/lenovo/s230u/romstage.c1
-rw-r--r--src/mainboard/lenovo/t400/fadt.c1
-rw-r--r--src/mainboard/lenovo/t400/romstage.c1
-rw-r--r--src/mainboard/lenovo/t420/romstage.c1
-rw-r--r--src/mainboard/lenovo/t420s/romstage.c1
-rw-r--r--src/mainboard/lenovo/t420s/smihandler.c1
-rw-r--r--src/mainboard/lenovo/t430/romstage.c1
-rw-r--r--src/mainboard/lenovo/t430s/romstage.c1
-rw-r--r--src/mainboard/lenovo/t430s/smihandler.c1
-rw-r--r--src/mainboard/lenovo/t430s/variants/t430s/romstage.c1
-rw-r--r--src/mainboard/lenovo/t520/romstage.c1
-rw-r--r--src/mainboard/lenovo/t520/smihandler.c1
-rw-r--r--src/mainboard/lenovo/t530/romstage.c1
-rw-r--r--src/mainboard/lenovo/t530/smihandler.c1
-rw-r--r--src/mainboard/lenovo/t60/romstage.c1
-rw-r--r--src/mainboard/lenovo/t60/smihandler.c1
-rw-r--r--src/mainboard/lenovo/thinkcentre_a58/romstage.c1
-rw-r--r--src/mainboard/lenovo/x131e/romstage.c1
-rw-r--r--src/mainboard/lenovo/x1_carbon_gen1/romstage.c1
-rw-r--r--src/mainboard/lenovo/x200/dock.c1
-rw-r--r--src/mainboard/lenovo/x200/fadt.c1
-rw-r--r--src/mainboard/lenovo/x200/romstage.c1
-rw-r--r--src/mainboard/lenovo/x201/dock.c1
-rw-r--r--src/mainboard/lenovo/x201/mainboard.c1
-rw-r--r--src/mainboard/lenovo/x201/romstage.c1
-rw-r--r--src/mainboard/lenovo/x201/smihandler.c1
-rw-r--r--src/mainboard/lenovo/x220/romstage.c1
-rw-r--r--src/mainboard/lenovo/x220/smihandler.c1
-rw-r--r--src/mainboard/lenovo/x230/romstage.c1
-rw-r--r--src/mainboard/lenovo/x60/romstage.c1
-rw-r--r--src/mainboard/lenovo/x60/smihandler.c1
-rw-r--r--src/mainboard/lenovo/z61t/romstage.c1
-rw-r--r--src/mainboard/lenovo/z61t/smihandler.c1
-rw-r--r--src/mainboard/lippert/frontrunner-af/mainboard.c1
-rw-r--r--src/mainboard/lippert/toucan-af/mainboard.c1
-rw-r--r--src/mainboard/msi/ms7721/romstage.c1
-rw-r--r--src/mainboard/msi/ms9652_fam10/get_bus_conf.c1
-rw-r--r--src/mainboard/msi/ms9652_fam10/mptable.c1
-rw-r--r--src/mainboard/msi/ms9652_fam10/romstage.c1
-rw-r--r--src/mainboard/ocp/wedge100s/romstage.c1
-rw-r--r--src/mainboard/packardbell/ms2290/romstage.c1
-rw-r--r--src/mainboard/packardbell/ms2290/smihandler.c1
-rw-r--r--src/mainboard/pcengines/apu1/mainboard.c1
-rw-r--r--src/mainboard/pcengines/apu2/mainboard.c1
-rw-r--r--src/mainboard/pcengines/apu2/romstage.c1
-rw-r--r--src/mainboard/roda/rk886ex/romstage.c1
-rw-r--r--src/mainboard/roda/rk9/fadt.c1
-rw-r--r--src/mainboard/roda/rk9/romstage.c1
-rw-r--r--src/mainboard/roda/rk9/ti_pci7xx1.c1
-rw-r--r--src/mainboard/roda/rv11/variants/rv11/romstage.c1
-rw-r--r--src/mainboard/roda/rv11/variants/rw11/romstage.c1
-rw-r--r--src/mainboard/samsung/lumpy/chromeos.c1
-rw-r--r--src/mainboard/samsung/lumpy/romstage.c1
-rw-r--r--src/mainboard/samsung/stumpy/chromeos.c1
-rw-r--r--src/mainboard/samsung/stumpy/romstage.c1
-rw-r--r--src/mainboard/sapphire/pureplatinumh61/romstage.c1
-rw-r--r--src/mainboard/siemens/mc_apl1/mainboard.c1
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c1
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/mptable.c1
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/romstage.c1
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c1
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/mptable.c1
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/romstage.c1
-rw-r--r--src/mainboard/supermicro/h8scm_fam10/acpi_tables.c1
-rw-r--r--src/mainboard/supermicro/h8scm_fam10/get_bus_conf.c1
-rw-r--r--src/mainboard/supermicro/h8scm_fam10/mptable.c1
-rw-r--r--src/mainboard/tyan/s2912_fam10/get_bus_conf.c1
-rw-r--r--src/mainboard/tyan/s2912_fam10/mptable.c1
-rw-r--r--src/mainboard/tyan/s2912_fam10/romstage.c1
-rw-r--r--src/mainboard/via/epia-m850/romstage.c3
-rw-r--r--src/northbridge/amd/agesa/family12/northbridge.c1
-rw-r--r--src/northbridge/amd/agesa/family14/northbridge.c1
-rw-r--r--src/northbridge/amd/agesa/family15tn/northbridge.c1
-rw-r--r--src/northbridge/amd/agesa/family16kb/northbridge.c1
-rw-r--r--src/northbridge/amd/amdfam10/debug.c1
-rw-r--r--src/northbridge/amd/amdfam10/early_ht.c1
-rw-r--r--src/northbridge/amd/amdfam10/northbridge.c1
-rw-r--r--src/northbridge/amd/amdfam10/pci.c1
-rw-r--r--src/northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c1
-rw-r--r--src/northbridge/amd/amdfam10/reset_test.c1
-rw-r--r--src/northbridge/amd/amdfam10/setup_resource_map.c1
-rw-r--r--src/northbridge/amd/amdht/comlib.c1
-rw-r--r--src/northbridge/amd/amdht/h3finit.c1
-rw-r--r--src/northbridge/amd/amdht/ht_wrapper.c1
-rw-r--r--src/northbridge/amd/amdk8/reset_test.c1
-rw-r--r--src/northbridge/amd/amdmct/mct/mct_d.c1
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mct_d.c1
-rw-r--r--src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c1
-rw-r--r--src/northbridge/amd/pi/00630F01/northbridge.c1
-rw-r--r--src/northbridge/amd/pi/00660F01/northbridge.c1
-rw-r--r--src/northbridge/amd/pi/00730F01/northbridge.c1
-rw-r--r--src/northbridge/amd/pi/ramtop.c1
-rw-r--r--src/northbridge/intel/e7505/debug.c1
-rw-r--r--src/northbridge/intel/e7505/memmap.c1
-rw-r--r--src/northbridge/intel/e7505/northbridge.c1
-rw-r--r--src/northbridge/intel/e7505/raminit.c1
-rw-r--r--src/northbridge/intel/fsp_rangeley/northbridge.c1
-rw-r--r--src/northbridge/intel/fsp_rangeley/port_access.c1
-rw-r--r--src/northbridge/intel/gm45/acpi.c1
-rw-r--r--src/northbridge/intel/gm45/bootblock.c1
-rw-r--r--src/northbridge/intel/gm45/early_init.c1
-rw-r--r--src/northbridge/intel/gm45/early_reset.c1
-rw-r--r--src/northbridge/intel/gm45/igd.c1
-rw-r--r--src/northbridge/intel/gm45/iommu.c1
-rw-r--r--src/northbridge/intel/gm45/northbridge.c1
-rw-r--r--src/northbridge/intel/gm45/pcie.c1
-rw-r--r--src/northbridge/intel/gm45/ram_calc.c1
-rw-r--r--src/northbridge/intel/gm45/raminit.c1
-rw-r--r--src/northbridge/intel/gm45/romstage.c1
-rw-r--r--src/northbridge/intel/haswell/acpi.c1
-rw-r--r--src/northbridge/intel/haswell/bootblock.c1
-rw-r--r--src/northbridge/intel/haswell/gma.c1
-rw-r--r--src/northbridge/intel/haswell/ram_calc.c1
-rw-r--r--src/northbridge/intel/haswell/report_platform.c1
-rw-r--r--src/northbridge/intel/i440bx/debug.c1
-rw-r--r--src/northbridge/intel/i440bx/northbridge.c1
-rw-r--r--src/northbridge/intel/i440bx/ram_calc.c1
-rw-r--r--src/northbridge/intel/i440bx/raminit.c1
-rw-r--r--src/northbridge/intel/i945/acpi.c1
-rw-r--r--src/northbridge/intel/i945/bootblock.c1
-rw-r--r--src/northbridge/intel/i945/debug.c1
-rw-r--r--src/northbridge/intel/i945/early_init.c1
-rw-r--r--src/northbridge/intel/i945/gma.c1
-rw-r--r--src/northbridge/intel/i945/northbridge.c1
-rw-r--r--src/northbridge/intel/i945/ram_calc.c1
-rw-r--r--src/northbridge/intel/i945/raminit.c1
-rw-r--r--src/northbridge/intel/nehalem/acpi.c1
-rw-r--r--src/northbridge/intel/nehalem/bootblock.c1
-rw-r--r--src/northbridge/intel/nehalem/early_init.c1
-rw-r--r--src/northbridge/intel/nehalem/northbridge.c1
-rw-r--r--src/northbridge/intel/nehalem/ram_calc.c1
-rw-r--r--src/northbridge/intel/nehalem/raminit.c1
-rw-r--r--src/northbridge/intel/nehalem/smi.c1
-rw-r--r--src/northbridge/intel/pineview/bootblock.c1
-rw-r--r--src/northbridge/intel/pineview/early_init.c1
-rw-r--r--src/northbridge/intel/pineview/northbridge.c1
-rw-r--r--src/northbridge/intel/pineview/ram_calc.c1
-rw-r--r--src/northbridge/intel/pineview/raminit.c1
-rw-r--r--src/northbridge/intel/pineview/romstage.c1
-rw-r--r--src/northbridge/intel/sandybridge/acpi.c1
-rw-r--r--src/northbridge/intel/sandybridge/bootblock.c1
-rw-r--r--src/northbridge/intel/sandybridge/early_init.c1
-rw-r--r--src/northbridge/intel/sandybridge/iommu.c1
-rw-r--r--src/northbridge/intel/sandybridge/northbridge.c1
-rw-r--r--src/northbridge/intel/sandybridge/pcie.c1
-rw-r--r--src/northbridge/intel/sandybridge/ram_calc.c1
-rw-r--r--src/northbridge/intel/sandybridge/raminit.c1
-rw-r--r--src/northbridge/intel/sandybridge/raminit_common.c1
-rw-r--r--src/northbridge/intel/sandybridge/raminit_mrc.c1
-rw-r--r--src/northbridge/intel/sandybridge/romstage.c1
-rw-r--r--src/northbridge/intel/x4x/bootblock.c1
-rw-r--r--src/northbridge/intel/x4x/early_init.c1
-rw-r--r--src/northbridge/intel/x4x/northbridge.c1
-rw-r--r--src/northbridge/intel/x4x/ram_calc.c1
-rw-r--r--src/northbridge/intel/x4x/raminit.c1
-rw-r--r--src/northbridge/intel/x4x/raminit_ddr23.c1
-rw-r--r--src/northbridge/via/vx900/bootblock.c1
-rw-r--r--src/northbridge/via/vx900/chrome9hd.c1
-rw-r--r--src/northbridge/via/vx900/early_smbus.c1
-rw-r--r--src/northbridge/via/vx900/early_vx900.c1
-rw-r--r--src/northbridge/via/vx900/lpc.c1
-rw-r--r--src/northbridge/via/vx900/memmap.c1
-rw-r--r--src/northbridge/via/vx900/northbridge.c1
-rw-r--r--src/northbridge/via/vx900/pcie.c1
-rw-r--r--src/northbridge/via/vx900/raminit_ddr3.c1
-rw-r--r--src/northbridge/via/vx900/sata.c1
-rw-r--r--src/northbridge/via/vx900/traf_ctrl.c1
-rw-r--r--src/northbridge/via/vx900/vx900.h2
-rw-r--r--src/soc/amd/common/block/pci/amd_pci_util.c1
-rw-r--r--src/soc/amd/stoneyridge/acpi.c1
-rw-r--r--src/soc/amd/stoneyridge/enable_usbdebug.c1
-rw-r--r--src/soc/amd/stoneyridge/northbridge.c1
-rw-r--r--src/soc/amd/stoneyridge/romstage.c1
-rw-r--r--src/soc/intel/apollolake/bootblock/bootblock.c1
-rw-r--r--src/soc/intel/apollolake/chip.c1
-rw-r--r--src/soc/intel/apollolake/graphics.c1
-rw-r--r--src/soc/intel/apollolake/romstage.c1
-rw-r--r--src/soc/intel/baytrail/bootblock/bootblock.c1
-rw-r--r--src/soc/intel/baytrail/chip.c1
-rw-r--r--src/soc/intel/baytrail/gfx.c1
-rw-r--r--src/soc/intel/baytrail/iosf.c1
-rw-r--r--src/soc/intel/baytrail/lpe.c1
-rw-r--r--src/soc/intel/baytrail/pcie.c1
-rw-r--r--src/soc/intel/baytrail/pmutil.c1
-rw-r--r--src/soc/intel/baytrail/romstage/gfx.c1
-rw-r--r--src/soc/intel/baytrail/romstage/pmc.c1
-rw-r--r--src/soc/intel/baytrail/romstage/raminit.c1
-rw-r--r--src/soc/intel/baytrail/romstage/romstage.c1
-rw-r--r--src/soc/intel/baytrail/romstage/uart.c1
-rw-r--r--src/soc/intel/baytrail/sata.c1
-rw-r--r--src/soc/intel/baytrail/sd.c1
-rw-r--r--src/soc/intel/baytrail/smihandler.c1
-rw-r--r--src/soc/intel/baytrail/southcluster.c1
-rw-r--r--src/soc/intel/baytrail/spi.c1
-rw-r--r--src/soc/intel/baytrail/xhci.c1
-rw-r--r--src/soc/intel/braswell/bootblock/bootblock.c1
-rw-r--r--src/soc/intel/braswell/chip.c1
-rw-r--r--src/soc/intel/braswell/iosf.c1
-rw-r--r--src/soc/intel/braswell/lpe.c1
-rw-r--r--src/soc/intel/braswell/pcie.c1
-rw-r--r--src/soc/intel/braswell/pmutil.c1
-rw-r--r--src/soc/intel/braswell/romstage/romstage.c1
-rw-r--r--src/soc/intel/braswell/sd.c1
-rw-r--r--src/soc/intel/braswell/smihandler.c1
-rw-r--r--src/soc/intel/braswell/southcluster.c1
-rw-r--r--src/soc/intel/braswell/spi.c1
-rw-r--r--src/soc/intel/broadwell/bootblock/pch.c1
-rw-r--r--src/soc/intel/broadwell/bootblock/systemagent.c1
-rw-r--r--src/soc/intel/broadwell/chip.c1
-rw-r--r--src/soc/intel/broadwell/ehci.c1
-rw-r--r--src/soc/intel/broadwell/igd.c1
-rw-r--r--src/soc/intel/broadwell/lpc.c1
-rw-r--r--src/soc/intel/broadwell/me.c1
-rw-r--r--src/soc/intel/broadwell/me_status.c1
-rw-r--r--src/soc/intel/broadwell/memmap.c1
-rw-r--r--src/soc/intel/broadwell/pch.c1
-rw-r--r--src/soc/intel/broadwell/pmutil.c1
-rw-r--r--src/soc/intel/broadwell/romstage/power_state.c1
-rw-r--r--src/soc/intel/broadwell/romstage/report_platform.c1
-rw-r--r--src/soc/intel/broadwell/romstage/systemagent.c1
-rw-r--r--src/soc/intel/broadwell/sata.c1
-rw-r--r--src/soc/intel/broadwell/serialio.c1
-rw-r--r--src/soc/intel/broadwell/smihandler.c1
-rw-r--r--src/soc/intel/broadwell/smmrelocate.c1
-rw-r--r--src/soc/intel/broadwell/spi.c1
-rw-r--r--src/soc/intel/broadwell/systemagent.c1
-rw-r--r--src/soc/intel/broadwell/xhci.c1
-rw-r--r--src/soc/intel/cannonlake/bootblock/pch.c1
-rw-r--r--src/soc/intel/cannonlake/bootblock/report_platform.c1
-rw-r--r--src/soc/intel/cannonlake/graphics.c1
-rw-r--r--src/soc/intel/cannonlake/lpc.c1
-rw-r--r--src/soc/intel/cannonlake/smmrelocate.c1
-rw-r--r--src/soc/intel/common/block/i2c/i2c.c1
-rw-r--r--src/soc/intel/common/block/lpc/lpc_lib.c1
-rw-r--r--src/soc/intel/common/block/p2sb/p2sb.c1
-rw-r--r--src/soc/intel/common/block/pmc/pmc.c1
-rw-r--r--src/soc/intel/common/block/sata/sata.c1
-rw-r--r--src/soc/intel/common/block/smbus/tco.c1
-rw-r--r--src/soc/intel/common/block/smm/smihandler.c1
-rw-r--r--src/soc/intel/common/block/systemagent/systemagent.c1
-rw-r--r--src/soc/intel/common/block/systemagent/systemagent_early.c1
-rw-r--r--src/soc/intel/denverton_ns/acpi.c1
-rw-r--r--src/soc/intel/denverton_ns/bootblock/uart.c1
-rw-r--r--src/soc/intel/denverton_ns/chip.c1
-rw-r--r--src/soc/intel/denverton_ns/lpc.c1
-rw-r--r--src/soc/intel/denverton_ns/pmc.c1
-rw-r--r--src/soc/intel/denverton_ns/romstage.c1
-rw-r--r--src/soc/intel/denverton_ns/sata.c1
-rw-r--r--src/soc/intel/denverton_ns/smihandler.c1
-rw-r--r--src/soc/intel/denverton_ns/soc_util.c1
-rw-r--r--src/soc/intel/denverton_ns/systemagent.c1
-rw-r--r--src/soc/intel/denverton_ns/uart.c1
-rw-r--r--src/soc/intel/denverton_ns/uart_debug.c2
-rw-r--r--src/soc/intel/denverton_ns/xhci.c1
-rw-r--r--src/soc/intel/fsp_baytrail/acpi.c1
-rw-r--r--src/soc/intel/fsp_baytrail/bootblock/bootblock.c1
-rw-r--r--src/soc/intel/fsp_baytrail/chip.c1
-rw-r--r--src/soc/intel/fsp_baytrail/i2c.c1
-rw-r--r--src/soc/intel/fsp_baytrail/iosf.c1
-rw-r--r--src/soc/intel/fsp_baytrail/lpe.c1
-rw-r--r--src/soc/intel/fsp_baytrail/pmutil.c1
-rw-r--r--src/soc/intel/fsp_baytrail/romstage/report_platform.c1
-rw-r--r--src/soc/intel/fsp_baytrail/romstage/romstage.c1
-rw-r--r--src/soc/intel/fsp_baytrail/romstage/uart.c1
-rw-r--r--src/soc/intel/fsp_baytrail/smihandler.c1
-rw-r--r--src/soc/intel/fsp_baytrail/southcluster.c1
-rw-r--r--src/soc/intel/fsp_baytrail/spi.c1
-rw-r--r--src/soc/intel/fsp_broadwell_de/acpi.c1
-rw-r--r--src/soc/intel/fsp_broadwell_de/chip.c1
-rw-r--r--src/soc/intel/fsp_broadwell_de/romstage/romstage.c1
-rw-r--r--src/soc/intel/fsp_broadwell_de/smmrelocate.c1
-rw-r--r--src/soc/intel/fsp_broadwell_de/southcluster.c1
-rw-r--r--src/soc/intel/fsp_broadwell_de/vtd.c1
-rw-r--r--src/soc/intel/icelake/bootblock/pch.c1
-rw-r--r--src/soc/intel/icelake/bootblock/report_platform.c1
-rw-r--r--src/soc/intel/icelake/graphics.c1
-rw-r--r--src/soc/intel/icelake/lpc.c1
-rw-r--r--src/soc/intel/icelake/smmrelocate.c1
-rw-r--r--src/soc/intel/quark/include/soc/ramstage.h1
-rw-r--r--src/soc/intel/quark/reg_access.c1
-rw-r--r--src/soc/intel/quark/romstage/report_platform.c1
-rw-r--r--src/soc/intel/quark/spi.c1
-rw-r--r--src/soc/intel/quark/storage_test.c1
-rw-r--r--src/soc/intel/skylake/bootblock/pch.c1
-rw-r--r--src/soc/intel/skylake/bootblock/report_platform.c1
-rw-r--r--src/soc/intel/skylake/chip_fsp20.c1
-rw-r--r--src/soc/intel/skylake/finalize.c1
-rw-r--r--src/soc/intel/skylake/graphics.c1
-rw-r--r--src/soc/intel/skylake/irq.c1
-rw-r--r--src/soc/intel/skylake/me.c1
-rw-r--r--src/soc/intel/skylake/pmutil.c1
-rw-r--r--src/soc/intel/skylake/romstage/systemagent.c1
-rw-r--r--src/soc/intel/skylake/smmrelocate.c1
-rw-r--r--src/soc/intel/skylake/thermal.c1
-rw-r--r--src/southbridge/amd/agesa/hudson/bootblock.c1
-rw-r--r--src/southbridge/amd/agesa/hudson/early_setup.c1
-rw-r--r--src/southbridge/amd/agesa/hudson/reset.c1
-rw-r--r--src/southbridge/amd/amd8111/amd8111.c1
-rw-r--r--src/southbridge/amd/amd8111/bootblock.c1
-rw-r--r--src/southbridge/amd/amd8111/early_smbus.c1
-rw-r--r--src/southbridge/amd/amd8111/reset.c1
-rw-r--r--src/southbridge/amd/cimx/sb800/bootblock.c1
-rw-r--r--src/southbridge/amd/cimx/sb800/fan.c1
-rw-r--r--src/southbridge/amd/cimx/sb800/late.c1
-rw-r--r--src/southbridge/amd/cimx/sb800/lpc.c1
-rw-r--r--src/southbridge/amd/cimx/sb800/reset.c1
-rw-r--r--src/southbridge/amd/cimx/sb900/bootblock.c1
-rw-r--r--src/southbridge/amd/cimx/sb900/lpc.c1
-rw-r--r--src/southbridge/amd/cimx/sb900/reset.c1
-rw-r--r--src/southbridge/amd/common/amd_pci_util.c1
-rw-r--r--src/southbridge/amd/pi/hudson/bootblock.c1
-rw-r--r--src/southbridge/amd/pi/hudson/early_setup.c1
-rw-r--r--src/southbridge/amd/pi/hudson/imc.c1
-rw-r--r--src/southbridge/amd/pi/hudson/reset.c1
-rw-r--r--src/southbridge/amd/rs780/early_setup.c1
-rw-r--r--src/southbridge/amd/sb700/bootblock.c1
-rw-r--r--src/southbridge/amd/sb700/early_setup.c1
-rw-r--r--src/southbridge/amd/sb700/reset.c1
-rw-r--r--src/southbridge/amd/sb700/sb700.h1
-rw-r--r--src/southbridge/amd/sb800/bootblock.c1
-rw-r--r--src/southbridge/amd/sr5650/cmn.h1
-rw-r--r--src/southbridge/amd/sr5650/early_setup.c1
-rw-r--r--src/southbridge/broadcom/bcm5785/bcm5785.c1
-rw-r--r--src/southbridge/broadcom/bcm5785/bootblock.c1
-rw-r--r--src/southbridge/broadcom/bcm5785/early_smbus.c1
-rw-r--r--src/southbridge/intel/bd82x6x/bootblock.c1
-rw-r--r--src/southbridge/intel/bd82x6x/early_me.c1
-rw-r--r--src/southbridge/intel/bd82x6x/early_me_mrc.c1
-rw-r--r--src/southbridge/intel/bd82x6x/early_pch.c1
-rw-r--r--src/southbridge/intel/bd82x6x/early_smbus.c1
-rw-r--r--src/southbridge/intel/bd82x6x/early_thermal.c1
-rw-r--r--src/southbridge/intel/bd82x6x/early_usb.c1
-rw-r--r--src/southbridge/intel/bd82x6x/early_usb_mrc.c1
-rw-r--r--src/southbridge/intel/bd82x6x/me.c1
-rw-r--r--src/southbridge/intel/bd82x6x/me_8.x.c1
-rw-r--r--src/southbridge/intel/bd82x6x/pch.c1
-rw-r--r--src/southbridge/intel/bd82x6x/pci.c1
-rw-r--r--src/southbridge/intel/bd82x6x/pcie.c1
-rw-r--r--src/southbridge/intel/bd82x6x/sata.c1
-rw-r--r--src/southbridge/intel/bd82x6x/smihandler.c1
-rw-r--r--src/southbridge/intel/bd82x6x/usb_ehci.c1
-rw-r--r--src/southbridge/intel/bd82x6x/usb_xhci.c1
-rw-r--r--src/southbridge/intel/bd82x6x/watchdog.c1
-rw-r--r--src/southbridge/intel/common/gpio.c1
-rw-r--r--src/southbridge/intel/common/pmbase.c1
-rw-r--r--src/southbridge/intel/common/smihandler.c1
-rw-r--r--src/southbridge/intel/common/spi.c1
-rw-r--r--src/southbridge/intel/common/usb_debug.c1
-rw-r--r--src/southbridge/intel/fsp_rangeley/acpi.c1
-rw-r--r--src/southbridge/intel/fsp_rangeley/early_init.c1
-rw-r--r--src/southbridge/intel/fsp_rangeley/early_smbus.c1
-rw-r--r--src/southbridge/intel/fsp_rangeley/early_usb.c1
-rw-r--r--src/southbridge/intel/fsp_rangeley/gpio.c1
-rw-r--r--src/southbridge/intel/fsp_rangeley/lpc.c1
-rw-r--r--src/southbridge/intel/fsp_rangeley/romstage.c1
-rw-r--r--src/southbridge/intel/fsp_rangeley/sata.c1
-rw-r--r--src/southbridge/intel/fsp_rangeley/soc.c1
-rw-r--r--src/southbridge/intel/fsp_rangeley/spi.c1
-rw-r--r--src/southbridge/intel/fsp_rangeley/watchdog.c1
-rw-r--r--src/southbridge/intel/i82371eb/bootblock.c1
-rw-r--r--src/southbridge/intel/i82371eb/early_pm.c1
-rw-r--r--src/southbridge/intel/i82371eb/early_smbus.c1
-rw-r--r--src/southbridge/intel/i82371eb/ide.c1
-rw-r--r--src/southbridge/intel/i82371eb/isa.c1
-rw-r--r--src/southbridge/intel/i82371eb/smbus.c1
-rw-r--r--src/southbridge/intel/i82801dx/ac97.c1
-rw-r--r--src/southbridge/intel/i82801dx/bootblock.c1
-rw-r--r--src/southbridge/intel/i82801dx/early_smbus.c1
-rw-r--r--src/southbridge/intel/i82801dx/i82801dx.c1
-rw-r--r--src/southbridge/intel/i82801dx/smi.c1
-rw-r--r--src/southbridge/intel/i82801dx/smihandler.c1
-rw-r--r--src/southbridge/intel/i82801gx/ac97.c1
-rw-r--r--src/southbridge/intel/i82801gx/bootblock.c1
-rw-r--r--src/southbridge/intel/i82801gx/early_smbus.c1
-rw-r--r--src/southbridge/intel/i82801gx/i82801gx.c1
-rw-r--r--src/southbridge/intel/i82801gx/ide.c1
-rw-r--r--src/southbridge/intel/i82801gx/lpc.c1
-rw-r--r--src/southbridge/intel/i82801gx/pci.c1
-rw-r--r--src/southbridge/intel/i82801gx/pcie.c1
-rw-r--r--src/southbridge/intel/i82801gx/sata.c1
-rw-r--r--src/southbridge/intel/i82801gx/usb.c1
-rw-r--r--src/southbridge/intel/i82801gx/usb_ehci.c1
-rw-r--r--src/southbridge/intel/i82801gx/watchdog.c1
-rw-r--r--src/southbridge/intel/i82801ix/bootblock.c1
-rw-r--r--src/southbridge/intel/i82801ix/early_init.c1
-rw-r--r--src/southbridge/intel/i82801ix/early_smbus.c1
-rw-r--r--src/southbridge/intel/i82801ix/i82801ix.c1
-rw-r--r--src/southbridge/intel/i82801ix/i82801ix.h2
-rw-r--r--src/southbridge/intel/i82801ix/lpc.c1
-rw-r--r--src/southbridge/intel/i82801ix/pci.c1
-rw-r--r--src/southbridge/intel/i82801ix/pcie.c1
-rw-r--r--src/southbridge/intel/i82801ix/sata.c1
-rw-r--r--src/southbridge/intel/i82801ix/smi.c1
-rw-r--r--src/southbridge/intel/i82801ix/thermal.c1
-rw-r--r--src/southbridge/intel/i82801ix/usb_ehci.c1
-rw-r--r--src/southbridge/intel/i82801jx/bootblock.c1
-rw-r--r--src/southbridge/intel/i82801jx/early_smbus.c1
-rw-r--r--src/southbridge/intel/i82801jx/i82801jx.c1
-rw-r--r--src/southbridge/intel/i82801jx/i82801jx.h2
-rw-r--r--src/southbridge/intel/i82801jx/lpc.c1
-rw-r--r--src/southbridge/intel/i82801jx/pci.c1
-rw-r--r--src/southbridge/intel/i82801jx/pcie.c1
-rw-r--r--src/southbridge/intel/i82801jx/sata.c1
-rw-r--r--src/southbridge/intel/i82801jx/thermal.c1
-rw-r--r--src/southbridge/intel/i82801jx/usb_ehci.c1
-rw-r--r--src/southbridge/intel/ibexpeak/early_smbus.c1
-rw-r--r--src/southbridge/intel/ibexpeak/early_thermal.c1
-rw-r--r--src/southbridge/intel/ibexpeak/lpc.c1
-rw-r--r--src/southbridge/intel/ibexpeak/me.c1
-rw-r--r--src/southbridge/intel/ibexpeak/sata.c1
-rw-r--r--src/southbridge/intel/ibexpeak/smi.c1
-rw-r--r--src/southbridge/intel/ibexpeak/smihandler.c1
-rw-r--r--src/southbridge/intel/ibexpeak/thermal.c1
-rw-r--r--src/southbridge/intel/ibexpeak/usb_ehci.c1
-rw-r--r--src/southbridge/intel/lynxpoint/bootblock.c1
-rw-r--r--src/southbridge/intel/lynxpoint/early_me.c1
-rw-r--r--src/southbridge/intel/lynxpoint/early_pch.c1
-rw-r--r--src/southbridge/intel/lynxpoint/early_smbus.c1
-rw-r--r--src/southbridge/intel/lynxpoint/early_usb.c1
-rw-r--r--src/southbridge/intel/lynxpoint/lp_gpio.c1
-rw-r--r--src/southbridge/intel/lynxpoint/me_9.x.c1
-rw-r--r--src/southbridge/intel/lynxpoint/pch.c1
-rw-r--r--src/southbridge/intel/lynxpoint/pci.c1
-rw-r--r--src/southbridge/intel/lynxpoint/sata.c1
-rw-r--r--src/southbridge/intel/lynxpoint/serialio.c1
-rw-r--r--src/southbridge/intel/lynxpoint/smihandler.c1
-rw-r--r--src/southbridge/intel/lynxpoint/usb_ehci.c1
-rw-r--r--src/southbridge/intel/lynxpoint/usb_xhci.c1
-rw-r--r--src/southbridge/intel/lynxpoint/watchdog.c1
-rw-r--r--src/southbridge/nvidia/ck804/bootblock.c1
-rw-r--r--src/southbridge/nvidia/ck804/early_smbus.c1
-rw-r--r--src/southbridge/nvidia/ck804/enable_usbdebug.c1
-rw-r--r--src/southbridge/nvidia/mcp55/bootblock.c1
-rw-r--r--src/southbridge/nvidia/mcp55/early_smbus.c1
-rw-r--r--src/southbridge/nvidia/mcp55/enable_usbdebug.c1
578 files changed, 579 insertions, 11 deletions
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h
index 20338e065b..aecf0b634c 100644
--- a/src/arch/x86/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
@@ -203,10 +203,6 @@ static __always_inline void write64(volatile void *addr,
}
#endif
-/* FIXME: We should avoid this indirect include. Also this has to
- * appear here after all MMIO and IO read/write functions. */
-#include <arch/pci_ops.h>
-
#ifdef __SIMPLE_DEVICE__
#define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC))
diff --git a/src/commonlib/storage/pci_sdhci.c b/src/commonlib/storage/pci_sdhci.c
index 9f7c521918..2bba084d11 100644
--- a/src/commonlib/storage/pci_sdhci.c
+++ b/src/commonlib/storage/pci_sdhci.c
@@ -21,6 +21,7 @@
#include <assert.h>
#include <commonlib/sdhci.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include "sd_mmc.h"
#include <stdint.h>
#include "storage.h"
diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.c b/src/cpu/amd/family_10h-family_15h/init_cpus.c
index 2ddbc43ee6..57d4424bb1 100644
--- a/src/cpu/amd/family_10h-family_15h/init_cpus.c
+++ b/src/cpu/amd/family_10h-family_15h/init_cpus.c
@@ -15,6 +15,7 @@
*/
#include <cpu/amd/msr.h>
+#include <device/pci_ops.h>
#include "init_cpus.h"
#if IS_ENABLED(CONFIG_HAVE_OPTION_TABLE)
diff --git a/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c b/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c
index abf02a3690..674ba782d7 100644
--- a/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c
+++ b/src/cpu/amd/family_10h-family_15h/model_10xxx_init.c
@@ -21,6 +21,7 @@
#include <cpu/amd/mtrr.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <cpu/x86/smm.h>
#include <cpu/x86/pae.h>
diff --git a/src/cpu/amd/family_10h-family_15h/monotonic_timer.c b/src/cpu/amd/family_10h-family_15h/monotonic_timer.c
index ad83684ed3..fe01345e24 100644
--- a/src/cpu/amd/family_10h-family_15h/monotonic_timer.c
+++ b/src/cpu/amd/family_10h-family_15h/monotonic_timer.c
@@ -19,6 +19,7 @@
#include <cpu/amd/msr.h>
#include <timer.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <northbridge/amd/amdht/AsPsDefs.h>
static struct monotonic_counter {
diff --git a/src/cpu/amd/family_10h-family_15h/powernow_acpi.c b/src/cpu/amd/family_10h-family_15h/powernow_acpi.c
index cf1646ebb4..2ce472215f 100644
--- a/src/cpu/amd/family_10h-family_15h/powernow_acpi.c
+++ b/src/cpu/amd/family_10h-family_15h/powernow_acpi.c
@@ -23,6 +23,7 @@
#include <arch/acpigen.h>
#include <cpu/amd/powernow.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <cpu/amd/mtrr.h>
#include <cpu/amd/amdfam10_sysconf.h>
#include <arch/cpu.h>
diff --git a/src/cpu/amd/family_10h-family_15h/ram_calc.c b/src/cpu/amd/family_10h-family_15h/ram_calc.c
index 57bd2fc999..0222bd0a5e 100644
--- a/src/cpu/amd/family_10h-family_15h/ram_calc.c
+++ b/src/cpu/amd/family_10h-family_15h/ram_calc.c
@@ -19,6 +19,7 @@
#include <cpu/amd/mtrr.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/cpu/amd/quadcore/amd_sibling.c b/src/cpu/amd/quadcore/amd_sibling.c
index f9259c2745..000cb88307 100644
--- a/src/cpu/amd/quadcore/amd_sibling.c
+++ b/src/cpu/amd/quadcore/amd_sibling.c
@@ -17,6 +17,7 @@
#include <cpu/x86/lapic.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <pc80/mc146818rtc.h>
#include <smp/spinlock.h>
#include <cpu/x86/mtrr.h>
diff --git a/src/cpu/amd/quadcore/quadcore.c b/src/cpu/amd/quadcore/quadcore.c
index c2d277ad3f..601675123e 100644
--- a/src/cpu/amd/quadcore/quadcore.c
+++ b/src/cpu/amd/quadcore/quadcore.c
@@ -17,6 +17,7 @@
#include <arch/cpu.h>
#include <console/console.h>
+#include <device/pci_ops.h>
#include <pc80/mc146818rtc.h>
#if IS_ENABLED(CONFIG_HAVE_OPTION_TABLE)
#include "option_table.h"
diff --git a/src/cpu/amd/quadcore/quadcore_id.c b/src/cpu/amd/quadcore/quadcore_id.c
index 47d9be9e6f..5afb051ace 100644
--- a/src/cpu/amd/quadcore/quadcore_id.c
+++ b/src/cpu/amd/quadcore/quadcore_id.c
@@ -18,6 +18,7 @@
#include <arch/cpu.h>
#include <cpu/amd/multicore.h>
+#include <device/pci_ops.h>
#ifdef __PRE_RAM__
#include <cpu/amd/msr.h>
#endif
diff --git a/src/cpu/intel/fsp_model_406dx/bootblock.c b/src/cpu/intel/fsp_model_406dx/bootblock.c
index 13c5d0f767..2ffbd8b09c 100644
--- a/src/cpu/intel/fsp_model_406dx/bootblock.c
+++ b/src/cpu/intel/fsp_model_406dx/bootblock.c
@@ -20,6 +20,7 @@
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <reset.h>
#include <southbridge/intel/fsp_rangeley/soc.h>
diff --git a/src/device/cardbus_device.c b/src/device/cardbus_device.c
index b572e85dde..adfc503581 100644
--- a/src/device/cardbus_device.c
+++ b/src/device/cardbus_device.c
@@ -18,6 +18,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <device/cardbus.h>
diff --git a/src/device/hypertransport.c b/src/device/hypertransport.c
index ed6b2dd998..ccad5ce5a5 100644
--- a/src/device/hypertransport.c
+++ b/src/device/hypertransport.c
@@ -24,6 +24,7 @@
#include <device/device.h>
#include <device/path.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <device/hypertransport.h>
diff --git a/src/device/pci_class.c b/src/device/pci_class.c
index 1326b2c0cc..aa28ce8205 100644
--- a/src/device/pci_class.c
+++ b/src/device/pci_class.c
@@ -16,6 +16,7 @@
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pciexp.h>
#include <device/pci_ids.h>
#include <stdlib.h>
diff --git a/src/device/pci_device.c b/src/device/pci_device.c
index 82033a6ad9..b275788157 100644
--- a/src/device/pci_device.c
+++ b/src/device/pci_device.c
@@ -33,6 +33,7 @@
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <bootmode.h>
#include <console/console.h>
#include <stdlib.h>
diff --git a/src/device/pcix_device.c b/src/device/pcix_device.c
index 1204660d7b..e327b88991 100644
--- a/src/device/pcix_device.c
+++ b/src/device/pcix_device.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pcix.h>
static void pcix_tune_dev(struct device *dev)
diff --git a/src/drivers/dec/21143/21143.c b/src/drivers/dec/21143/21143.c
index 36f86f1ee7..3af334b00f 100644
--- a/src/drivers/dec/21143/21143.c
+++ b/src/drivers/dec/21143/21143.c
@@ -17,6 +17,7 @@
#include <device/device.h>
#include <device/pci_def.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <console/console.h>
diff --git a/src/drivers/generic/bayhub/bh720.c b/src/drivers/generic/bayhub/bh720.c
index 2ac5387a2b..09fa578e86 100644
--- a/src/drivers/generic/bayhub/bh720.c
+++ b/src/drivers/generic/bayhub/bh720.c
@@ -19,6 +19,7 @@
#include <device/device.h>
#include <device/path.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include "chip.h"
#include "bh720.h"
diff --git a/src/drivers/intel/gma/vbt.c b/src/drivers/intel/gma/vbt.c
index f7dc99cef5..2cfe62bcb4 100644
--- a/src/drivers/intel/gma/vbt.c
+++ b/src/drivers/intel/gma/vbt.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <delay.h>
#include <device/device.h>
#include <string.h>
diff --git a/src/drivers/intel/wifi/wifi.c b/src/drivers/intel/wifi/wifi.c
index ade5087db1..bb617d5d0a 100644
--- a/src/drivers/intel/wifi/wifi.c
+++ b/src/drivers/intel/wifi/wifi.c
@@ -20,6 +20,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <elog.h>
#include <sar.h>
diff --git a/src/drivers/net/atl1e.c b/src/drivers/net/atl1e.c
index 7e02e810b0..bbfe98a540 100644
--- a/src/drivers/net/atl1e.c
+++ b/src/drivers/net/atl1e.c
@@ -25,6 +25,7 @@
#include <string.h>
#include <console/console.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#define REG_SPI_FLASH_CTRL 0x200
#define SPI_FLASH_CTRL_EN_VPD 0x2000
diff --git a/src/drivers/ricoh/rce822/rce822.c b/src/drivers/ricoh/rce822/rce822.c
index d576762989..57f01dc99f 100644
--- a/src/drivers/ricoh/rce822/rce822.c
+++ b/src/drivers/ricoh/rce822/rce822.c
@@ -18,6 +18,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include "chip.h"
static void rce822_enable(struct device *dev)
diff --git a/src/drivers/uart/oxpcie.c b/src/drivers/uart/oxpcie.c
index 7364a75411..168ed6aeb1 100644
--- a/src/drivers/uart/oxpcie.c
+++ b/src/drivers/uart/oxpcie.c
@@ -20,6 +20,7 @@
#include <console/console.h>
#include <console/uart.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
static void oxford_oxpcie_enable(struct device *dev)
{
diff --git a/src/drivers/uart/oxpcie_early.c b/src/drivers/uart/oxpcie_early.c
index 2a01cb60b7..b81a7ffa91 100644
--- a/src/drivers/uart/oxpcie_early.c
+++ b/src/drivers/uart/oxpcie_early.c
@@ -18,6 +18,7 @@
#include <stdint.h>
#include <stddef.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/early_variables.h>
#include <boot/coreboot_tables.h>
#include <console/uart.h>
diff --git a/src/drivers/usb/pci_ehci.c b/src/drivers/usb/pci_ehci.c
index c05129163e..4028d4b225 100644
--- a/src/drivers/usb/pci_ehci.c
+++ b/src/drivers/usb/pci_ehci.c
@@ -18,6 +18,7 @@
#include <console/console.h>
#include <device/pci_ehci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci.h>
#include <device/pci_def.h>
#include <string.h>
diff --git a/src/include/device/pci.h b/src/include/device/pci.h
index 71d6b2025a..814433dec8 100644
--- a/src/include/device/pci.h
+++ b/src/include/device/pci.h
@@ -23,7 +23,6 @@
#include <device/pci_def.h>
#include <device/resource.h>
#include <device/device.h>
-#include <device/pci_ops.h>
#include <device/pci_rom.h>
diff --git a/src/include/device/pci_ops.h b/src/include/device/pci_ops.h
index 54284f590a..1cf5b77bf7 100644
--- a/src/include/device/pci_ops.h
+++ b/src/include/device/pci_ops.h
@@ -12,7 +12,7 @@ u32 pci_read_config32(struct device *dev, unsigned int where);
void pci_write_config8(struct device *dev, unsigned int where, u8 val);
void pci_write_config16(struct device *dev, unsigned int where, u16 val);
void pci_write_config32(struct device *dev, unsigned int where, u32 val);
-
+const struct pci_bus_operations *pci_bus_default_ops(struct device *dev);
#endif
#ifdef __SIMPLE_DEVICE__
@@ -99,6 +99,4 @@ void pci_update_config32(struct device *dev, int reg, u32 mask, u32 or)
pci_write_config32(dev, reg, reg32);
}
-const struct pci_bus_operations *pci_bus_default_ops(struct device *dev);
-
#endif /* PCI_OPS_H */
diff --git a/src/lib/reg_script.c b/src/lib/reg_script.c
index 926a6590dc..ed709eeb42 100644
--- a/src/lib/reg_script.c
+++ b/src/lib/reg_script.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
diff --git a/src/mainboard/adi/rcc-dff/romstage.c b/src/mainboard/adi/rcc-dff/romstage.c
index 1925c7811e..3f97c82657 100644
--- a/src/mainboard/adi/rcc-dff/romstage.c
+++ b/src/mainboard/adi/rcc-dff/romstage.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
#include <drivers/intel/fsp1_0/fsp_util.h>
diff --git a/src/mainboard/advansus/a785e-i/romstage.c b/src/mainboard/advansus/a785e-i/romstage.c
index 244dfad3f8..bb830b2202 100644
--- a/src/mainboard/advansus/a785e-i/romstage.c
+++ b/src/mainboard/advansus/a785e-i/romstage.c
@@ -19,6 +19,7 @@
#include <string.h>
#include <device/pci_def.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
#include <timestamp.h>
diff --git a/src/mainboard/amd/bimini_fam10/romstage.c b/src/mainboard/amd/bimini_fam10/romstage.c
index a3de524dec..765bb2411e 100644
--- a/src/mainboard/amd/bimini_fam10/romstage.c
+++ b/src/mainboard/amd/bimini_fam10/romstage.c
@@ -19,6 +19,7 @@
#include <string.h>
#include <device/pci_def.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/amd/mahogany_fam10/mainboard.c b/src/mainboard/amd/mahogany_fam10/mainboard.c
index e2bc54eded..48f3f34e14 100644
--- a/src/mainboard/amd/mahogany_fam10/mainboard.c
+++ b/src/mainboard/amd/mahogany_fam10/mainboard.c
@@ -17,6 +17,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <southbridge/amd/sb700/sb700.h>
#include <southbridge/amd/sb700/smbus.h>
diff --git a/src/mainboard/amd/mahogany_fam10/mptable.c b/src/mainboard/amd/mahogany_fam10/mptable.c
index 895b747f2e..8c6ecf3747 100644
--- a/src/mainboard/amd/mahogany_fam10/mptable.c
+++ b/src/mainboard/amd/mahogany_fam10/mptable.c
@@ -16,6 +16,7 @@
#include <arch/smp/mpspec.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/amd/olivehill/romstage.c b/src/mainboard/amd/olivehill/romstage.c
index 4316d4f5e8..b82f0f8d40 100644
--- a/src/mainboard/amd/olivehill/romstage.c
+++ b/src/mainboard/amd/olivehill/romstage.c
@@ -17,6 +17,7 @@
#include <string.h>
#include <device/pci_def.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <commonlib/loglevel.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
diff --git a/src/mainboard/amd/parmer/romstage.c b/src/mainboard/amd/parmer/romstage.c
index 1eb92037d6..397f361e21 100644
--- a/src/mainboard/amd/parmer/romstage.c
+++ b/src/mainboard/amd/parmer/romstage.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c b/src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c
index 59d567364b..33a81c6327 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c
@@ -15,6 +15,7 @@
#include <console/console.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/multicore.h>
diff --git a/src/mainboard/amd/thatcher/romstage.c b/src/mainboard/amd/thatcher/romstage.c
index 11d6837c5a..ed22ed1df3 100644
--- a/src/mainboard/amd/thatcher/romstage.c
+++ b/src/mainboard/amd/thatcher/romstage.c
@@ -18,6 +18,7 @@
#include <device/pci_def.h>
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <commonlib/loglevel.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
diff --git a/src/mainboard/amd/tilapia_fam10/mainboard.c b/src/mainboard/amd/tilapia_fam10/mainboard.c
index ec0144aac4..63d3671db7 100644
--- a/src/mainboard/amd/tilapia_fam10/mainboard.c
+++ b/src/mainboard/amd/tilapia_fam10/mainboard.c
@@ -17,6 +17,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <southbridge/amd/sb700/sb700.h>
#include <southbridge/amd/sb700/smbus.h>
diff --git a/src/mainboard/amd/tilapia_fam10/mptable.c b/src/mainboard/amd/tilapia_fam10/mptable.c
index 895b747f2e..8c6ecf3747 100644
--- a/src/mainboard/amd/tilapia_fam10/mptable.c
+++ b/src/mainboard/amd/tilapia_fam10/mptable.c
@@ -16,6 +16,7 @@
#include <arch/smp/mpspec.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/aopen/dxplplusu/fadt.c b/src/mainboard/aopen/dxplplusu/fadt.c
index 17f1a9db86..c93733b085 100644
--- a/src/mainboard/aopen/dxplplusu/fadt.c
+++ b/src/mainboard/aopen/dxplplusu/fadt.c
@@ -15,6 +15,7 @@
#include <string.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <arch/acpi.h>
#include <version.h>
diff --git a/src/mainboard/apple/macbook21/romstage.c b/src/mainboard/apple/macbook21/romstage.c
index 291eabbc0f..570360d5a7 100644
--- a/src/mainboard/apple/macbook21/romstage.c
+++ b/src/mainboard/apple/macbook21/romstage.c
@@ -20,6 +20,7 @@
#include <stdint.h>
#include <string.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/intel/romstage.h>
#include <cpu/x86/lapic.h>
diff --git a/src/mainboard/apple/macbookair4_2/romstage.c b/src/mainboard/apple/macbookair4_2/romstage.c
index 1a365b1827..7ccbd6dbf8 100644
--- a/src/mainboard/apple/macbookair4_2/romstage.c
+++ b/src/mainboard/apple/macbookair4_2/romstage.c
@@ -15,6 +15,7 @@
#include <string.h>
#include <arch/byteorder.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
diff --git a/src/mainboard/asrock/b75pro3-m/romstage.c b/src/mainboard/asrock/b75pro3-m/romstage.c
index 050d6c50b3..205c08c0f1 100644
--- a/src/mainboard/asrock/b75pro3-m/romstage.c
+++ b/src/mainboard/asrock/b75pro3-m/romstage.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <superio/nuvoton/nct6776/nct6776.h>
#include <superio/nuvoton/common/nuvoton.h>
diff --git a/src/mainboard/asrock/g41c-gs/romstage.c b/src/mainboard/asrock/g41c-gs/romstage.c
index ab6b1d88ae..12f5cd4ffd 100644
--- a/src/mainboard/asrock/g41c-gs/romstage.c
+++ b/src/mainboard/asrock/g41c-gs/romstage.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/intel/romstage.h>
#include <cpu/x86/bist.h>
diff --git a/src/mainboard/asrock/imb-a180/romstage.c b/src/mainboard/asrock/imb-a180/romstage.c
index 0081c2f871..83fc9a01b0 100644
--- a/src/mainboard/asrock/imb-a180/romstage.c
+++ b/src/mainboard/asrock/imb-a180/romstage.c
@@ -18,6 +18,7 @@
#include <device/pci_def.h>
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <commonlib/loglevel.h>
#include <northbridge/amd/agesa/state_machine.h>
diff --git a/src/mainboard/asus/am1i-a/romstage.c b/src/mainboard/asus/am1i-a/romstage.c
index 76e2290173..c42b86c288 100644
--- a/src/mainboard/asus/am1i-a/romstage.c
+++ b/src/mainboard/asus/am1i-a/romstage.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <commonlib/loglevel.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <southbridge/amd/common/amd_defs.h>
diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c
index d540bf01fa..db50765a82 100644
--- a/src/mainboard/asus/f2a85-m/romstage.c
+++ b/src/mainboard/asus/f2a85-m/romstage.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <southbridge/amd/common/amd_defs.h>
diff --git a/src/mainboard/asus/h61m-cs/romstage.c b/src/mainboard/asus/h61m-cs/romstage.c
index 0b62286d3b..a0083fb354 100644
--- a/src/mainboard/asus/h61m-cs/romstage.c
+++ b/src/mainboard/asus/h61m-cs/romstage.c
@@ -16,6 +16,7 @@
*/
#include <northbridge/intel/sandybridge/sandybridge.h>
+#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <superio/nuvoton/common/nuvoton.h>
diff --git a/src/mainboard/asus/kcma-d8/acpi_tables.c b/src/mainboard/asus/kcma-d8/acpi_tables.c
index ef074608af..52840cac6e 100644
--- a/src/mainboard/asus/kcma-d8/acpi_tables.c
+++ b/src/mainboard/asus/kcma-d8/acpi_tables.c
@@ -18,6 +18,7 @@
#include <arch/acpi.h>
#include <arch/ioapic.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <cpu/amd/amdfam10_sysconf.h>
unsigned long acpi_fill_madt(unsigned long current)
diff --git a/src/mainboard/asus/kcma-d8/bootblock.c b/src/mainboard/asus/kcma-d8/bootblock.c
index 4e8a79040f..01c99baeda 100644
--- a/src/mainboard/asus/kcma-d8/bootblock.c
+++ b/src/mainboard/asus/kcma-d8/bootblock.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <pc80/mc146818rtc.h>
void bootblock_mainboard_init(void)
diff --git a/src/mainboard/asus/kcma-d8/mainboard.c b/src/mainboard/asus/kcma-d8/mainboard.c
index 729ad35b13..dca89ef260 100644
--- a/src/mainboard/asus/kcma-d8/mainboard.c
+++ b/src/mainboard/asus/kcma-d8/mainboard.c
@@ -18,6 +18,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <device/pci_def.h>
diff --git a/src/mainboard/asus/kcma-d8/mptable.c b/src/mainboard/asus/kcma-d8/mptable.c
index 22dbd1a49d..452c7a546f 100644
--- a/src/mainboard/asus/kcma-d8/mptable.c
+++ b/src/mainboard/asus/kcma-d8/mptable.c
@@ -17,6 +17,7 @@
#include <arch/smp/mpspec.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/asus/kcma-d8/romstage.c b/src/mainboard/asus/kcma-d8/romstage.c
index 4493b252bc..028af4c938 100644
--- a/src/mainboard/asus/kcma-d8/romstage.c
+++ b/src/mainboard/asus/kcma-d8/romstage.c
@@ -21,6 +21,7 @@
#include <string.h>
#include <device/pci_def.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/asus/kfsn4-dre/acpi_tables.c b/src/mainboard/asus/kfsn4-dre/acpi_tables.c
index e5e2613f28..530521b197 100644
--- a/src/mainboard/asus/kfsn4-dre/acpi_tables.c
+++ b/src/mainboard/asus/kfsn4-dre/acpi_tables.c
@@ -24,6 +24,7 @@
#include <assert.h>
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/smp/mpspec.h>
#include <device/pci.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/asus/kfsn4-dre/get_bus_conf.c b/src/mainboard/asus/kfsn4-dre/get_bus_conf.c
index 806bad91d4..82172e82d5 100644
--- a/src/mainboard/asus/kfsn4-dre/get_bus_conf.c
+++ b/src/mainboard/asus/kfsn4-dre/get_bus_conf.c
@@ -20,6 +20,7 @@
#include <console/console.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <stdlib.h>
diff --git a/src/mainboard/asus/kfsn4-dre/mptable.c b/src/mainboard/asus/kfsn4-dre/mptable.c
index 69ea301d15..ad3f742373 100644
--- a/src/mainboard/asus/kfsn4-dre/mptable.c
+++ b/src/mainboard/asus/kfsn4-dre/mptable.c
@@ -24,6 +24,7 @@
#include <arch/smp/mpspec.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/asus/kfsn4-dre/romstage.c b/src/mainboard/asus/kfsn4-dre/romstage.c
index e25120edea..66ebbdc555 100644
--- a/src/mainboard/asus/kfsn4-dre/romstage.c
+++ b/src/mainboard/asus/kfsn4-dre/romstage.c
@@ -22,6 +22,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/asus/kgpe-d16/acpi_tables.c b/src/mainboard/asus/kgpe-d16/acpi_tables.c
index ef074608af..52840cac6e 100644
--- a/src/mainboard/asus/kgpe-d16/acpi_tables.c
+++ b/src/mainboard/asus/kgpe-d16/acpi_tables.c
@@ -18,6 +18,7 @@
#include <arch/acpi.h>
#include <arch/ioapic.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <cpu/amd/amdfam10_sysconf.h>
unsigned long acpi_fill_madt(unsigned long current)
diff --git a/src/mainboard/asus/kgpe-d16/bootblock.c b/src/mainboard/asus/kgpe-d16/bootblock.c
index 4e8a79040f..01c99baeda 100644
--- a/src/mainboard/asus/kgpe-d16/bootblock.c
+++ b/src/mainboard/asus/kgpe-d16/bootblock.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <pc80/mc146818rtc.h>
void bootblock_mainboard_init(void)
diff --git a/src/mainboard/asus/kgpe-d16/mainboard.c b/src/mainboard/asus/kgpe-d16/mainboard.c
index d41a038461..564826b96f 100644
--- a/src/mainboard/asus/kgpe-d16/mainboard.c
+++ b/src/mainboard/asus/kgpe-d16/mainboard.c
@@ -18,6 +18,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h>
#include <device/pci_def.h>
diff --git a/src/mainboard/asus/kgpe-d16/mptable.c b/src/mainboard/asus/kgpe-d16/mptable.c
index e91a424264..fa31fc534c 100644
--- a/src/mainboard/asus/kgpe-d16/mptable.c
+++ b/src/mainboard/asus/kgpe-d16/mptable.c
@@ -17,6 +17,7 @@
#include <arch/smp/mpspec.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c
index a14d944386..5c4dbe8e53 100644
--- a/src/mainboard/asus/kgpe-d16/romstage.c
+++ b/src/mainboard/asus/kgpe-d16/romstage.c
@@ -21,6 +21,7 @@
#include <string.h>
#include <device/pci_def.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/asus/m4a78-em/mainboard.c b/src/mainboard/asus/m4a78-em/mainboard.c
index fb01236beb..1607e7f5f3 100644
--- a/src/mainboard/asus/m4a78-em/mainboard.c
+++ b/src/mainboard/asus/m4a78-em/mainboard.c
@@ -17,6 +17,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <southbridge/amd/sb700/sb700.h>
#include <southbridge/amd/sb700/smbus.h>
diff --git a/src/mainboard/asus/m4a78-em/mptable.c b/src/mainboard/asus/m4a78-em/mptable.c
index 895b747f2e..8c6ecf3747 100644
--- a/src/mainboard/asus/m4a78-em/mptable.c
+++ b/src/mainboard/asus/m4a78-em/mptable.c
@@ -16,6 +16,7 @@
#include <arch/smp/mpspec.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/asus/m4a785-m/mainboard.c b/src/mainboard/asus/m4a785-m/mainboard.c
index 6d0f5497d9..f5683f84e0 100644
--- a/src/mainboard/asus/m4a785-m/mainboard.c
+++ b/src/mainboard/asus/m4a785-m/mainboard.c
@@ -17,6 +17,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <southbridge/amd/sb700/sb700.h>
#include <southbridge/amd/sb700/smbus.h>
diff --git a/src/mainboard/asus/m4a785-m/mptable.c b/src/mainboard/asus/m4a785-m/mptable.c
index 895b747f2e..8c6ecf3747 100644
--- a/src/mainboard/asus/m4a785-m/mptable.c
+++ b/src/mainboard/asus/m4a785-m/mptable.c
@@ -16,6 +16,7 @@
#include <arch/smp/mpspec.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/asus/m5a88-v/romstage.c b/src/mainboard/asus/m5a88-v/romstage.c
index d86db7a74f..0fe961f88f 100644
--- a/src/mainboard/asus/m5a88-v/romstage.c
+++ b/src/mainboard/asus/m5a88-v/romstage.c
@@ -21,6 +21,7 @@
#include <string.h>
#include <device/pci_def.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/asus/p5gc-mx/romstage.c b/src/mainboard/asus/p5gc-mx/romstage.c
index 2a9a292ee5..649380934f 100644
--- a/src/mainboard/asus/p5gc-mx/romstage.c
+++ b/src/mainboard/asus/p5gc-mx/romstage.c
@@ -20,6 +20,7 @@
#include <stdint.h>
#include <string.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
#include <arch/acpi.h>
diff --git a/src/mainboard/asus/p5qc/romstage.c b/src/mainboard/asus/p5qc/romstage.c
index 5d585c883d..fa8408d640 100644
--- a/src/mainboard/asus/p5qc/romstage.c
+++ b/src/mainboard/asus/p5qc/romstage.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <southbridge/intel/i82801jx/i82801jx.h>
#include <southbridge/intel/common/gpio.h>
diff --git a/src/mainboard/asus/p5qpl-am/romstage.c b/src/mainboard/asus/p5qpl-am/romstage.c
index 7f84b6aded..c172ef8459 100644
--- a/src/mainboard/asus/p5qpl-am/romstage.c
+++ b/src/mainboard/asus/p5qpl-am/romstage.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/intel/romstage.h>
#include <cpu/intel/speedstep.h>
diff --git a/src/mainboard/asus/p8h61-m_pro/romstage.c b/src/mainboard/asus/p8h61-m_pro/romstage.c
index a6785ed418..63daa2ec99 100644
--- a/src/mainboard/asus/p8h61-m_pro/romstage.c
+++ b/src/mainboard/asus/p8h61-m_pro/romstage.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/avalue/eax-785e/romstage.c b/src/mainboard/avalue/eax-785e/romstage.c
index d3794af8eb..8e9fedbdc0 100644
--- a/src/mainboard/avalue/eax-785e/romstage.c
+++ b/src/mainboard/avalue/eax-785e/romstage.c
@@ -19,6 +19,7 @@
#include <string.h>
#include <device/pci_def.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/bap/ode_e20XX/romstage.c b/src/mainboard/bap/ode_e20XX/romstage.c
index 9921f368f4..ef7a7fb65b 100644
--- a/src/mainboard/bap/ode_e20XX/romstage.c
+++ b/src/mainboard/bap/ode_e20XX/romstage.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
#include <northbridge/amd/agesa/state_machine.h>
diff --git a/src/mainboard/biostar/a68n_5200/romstage.c b/src/mainboard/biostar/a68n_5200/romstage.c
index f587257408..15834fbedd 100644
--- a/src/mainboard/biostar/a68n_5200/romstage.c
+++ b/src/mainboard/biostar/a68n_5200/romstage.c
@@ -19,6 +19,7 @@
#include <string.h>
#include <device/pci_def.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <commonlib/loglevel.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
diff --git a/src/mainboard/biostar/am1ml/romstage.c b/src/mainboard/biostar/am1ml/romstage.c
index 94d2abe045..9ac32a3675 100644
--- a/src/mainboard/biostar/am1ml/romstage.c
+++ b/src/mainboard/biostar/am1ml/romstage.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <commonlib/loglevel.h>
#include <northbridge/amd/agesa/state_machine.h>
diff --git a/src/mainboard/compulab/intense_pc/romstage.c b/src/mainboard/compulab/intense_pc/romstage.c
index a913f7738e..3cb7067665 100644
--- a/src/mainboard/compulab/intense_pc/romstage.c
+++ b/src/mainboard/compulab/intense_pc/romstage.c
@@ -15,6 +15,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <superio/smsc/sio1007/chip.h>
diff --git a/src/mainboard/emulation/qemu-i440fx/northbridge.c b/src/mainboard/emulation/qemu-i440fx/northbridge.c
index 0ff4c54e99..1493565d5e 100644
--- a/src/mainboard/emulation/qemu-i440fx/northbridge.c
+++ b/src/mainboard/emulation/qemu-i440fx/northbridge.c
@@ -15,6 +15,7 @@
#include <cpu/cpu.h>
#include <cpu/x86/lapic_def.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/ioapic.h>
#include <stdint.h>
#include <device/device.h>
diff --git a/src/mainboard/emulation/qemu-q35/acpi_tables.c b/src/mainboard/emulation/qemu-q35/acpi_tables.c
index e1eaa29449..e7147fc6ab 100644
--- a/src/mainboard/emulation/qemu-q35/acpi_tables.c
+++ b/src/mainboard/emulation/qemu-q35/acpi_tables.c
@@ -21,6 +21,7 @@
#include <arch/smp/mpspec.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <version.h>
#include "../qemu-i440fx/fw_cfg.h"
diff --git a/src/mainboard/emulation/qemu-q35/bootblock.c b/src/mainboard/emulation/qemu-q35/bootblock.c
index 18a083d80a..5ee5fc9738 100644
--- a/src/mainboard/emulation/qemu-q35/bootblock.c
+++ b/src/mainboard/emulation/qemu-q35/bootblock.c
@@ -12,6 +12,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <bootblock_common.h>
#include <southbridge/intel/i82801ix/i82801ix.h>
diff --git a/src/mainboard/foxconn/d41s/romstage.c b/src/mainboard/foxconn/d41s/romstage.c
index c88123b1ce..fefc5f9884 100644
--- a/src/mainboard/foxconn/d41s/romstage.c
+++ b/src/mainboard/foxconn/d41s/romstage.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <southbridge/intel/i82801gx/i82801gx.h>
#include <northbridge/intel/pineview/pineview.h>
#include <superio/ite/common/ite.h>
diff --git a/src/mainboard/foxconn/g41s-k/romstage.c b/src/mainboard/foxconn/g41s-k/romstage.c
index 7c1402ac44..e6301df33f 100644
--- a/src/mainboard/foxconn/g41s-k/romstage.c
+++ b/src/mainboard/foxconn/g41s-k/romstage.c
@@ -18,6 +18,7 @@
#include <cpu/x86/bist.h>
#include <cpu/intel/romstage.h>
+#include <device/pci_ops.h>
#include <northbridge/intel/x4x/iomap.h>
#include <northbridge/intel/x4x/x4x.h>
#include <southbridge/intel/common/gpio.h>
diff --git a/src/mainboard/getac/p470/mainboard.c b/src/mainboard/getac/p470/mainboard.c
index 5d271fd65b..20e723030a 100644
--- a/src/mainboard/getac/p470/mainboard.c
+++ b/src/mainboard/getac/p470/mainboard.c
@@ -17,6 +17,7 @@
#include <device/device.h>
#include <device/pci_def.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <delay.h>
#include <drivers/intel/gma/int15.h>
diff --git a/src/mainboard/getac/p470/romstage.c b/src/mainboard/getac/p470/romstage.c
index 3f80664a99..dcfd27ff89 100644
--- a/src/mainboard/getac/p470/romstage.c
+++ b/src/mainboard/getac/p470/romstage.c
@@ -17,6 +17,7 @@
#include <stdint.h>
#include <string.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
#include <arch/acpi.h>
diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c b/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
index a9d3c25639..8d714a08b5 100644
--- a/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
+++ b/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
@@ -19,6 +19,7 @@
#include <stdint.h>
#include <string.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
#include <arch/acpi.h>
diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c b/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c
index dbb015d41b..aa5f4840a3 100644
--- a/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c
+++ b/src/mainboard/gigabyte/ga-b75m-d3h/romstage.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c b/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c
index 89f475ea88..035e20e2a9 100644
--- a/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c
+++ b/src/mainboard/gigabyte/ga-b75m-d3v/romstage.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c
index 2b9f4fba27..c5d731c3ea 100644
--- a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c
+++ b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c
@@ -17,6 +17,7 @@
#include <stdint.h>
#include <device/pci_def.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <southbridge/intel/i82801gx/i82801gx.h>
#include <southbridge/intel/common/gpio.h>
diff --git a/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c b/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c
index f1cd176641..7154cc9d22 100644
--- a/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c
+++ b/src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/gigabyte/ma785gm/mainboard.c b/src/mainboard/gigabyte/ma785gm/mainboard.c
index d11deb082b..ddf55b623f 100644
--- a/src/mainboard/gigabyte/ma785gm/mainboard.c
+++ b/src/mainboard/gigabyte/ma785gm/mainboard.c
@@ -17,6 +17,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <southbridge/amd/sb700/sb700.h>
#include <southbridge/amd/sb700/smbus.h>
diff --git a/src/mainboard/gigabyte/ma785gm/mptable.c b/src/mainboard/gigabyte/ma785gm/mptable.c
index 895b747f2e..8c6ecf3747 100644
--- a/src/mainboard/gigabyte/ma785gm/mptable.c
+++ b/src/mainboard/gigabyte/ma785gm/mptable.c
@@ -16,6 +16,7 @@
#include <arch/smp/mpspec.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/gigabyte/ma785gmt/mainboard.c b/src/mainboard/gigabyte/ma785gmt/mainboard.c
index 3b4edeece0..22f71d05dc 100644
--- a/src/mainboard/gigabyte/ma785gmt/mainboard.c
+++ b/src/mainboard/gigabyte/ma785gmt/mainboard.c
@@ -17,6 +17,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <southbridge/amd/sb700/sb700.h>
#include <southbridge/amd/sb700/smbus.h>
diff --git a/src/mainboard/gigabyte/ma785gmt/mptable.c b/src/mainboard/gigabyte/ma785gmt/mptable.c
index 895b747f2e..8c6ecf3747 100644
--- a/src/mainboard/gigabyte/ma785gmt/mptable.c
+++ b/src/mainboard/gigabyte/ma785gmt/mptable.c
@@ -16,6 +16,7 @@
#include <arch/smp/mpspec.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/gigabyte/ma78gm/mainboard.c b/src/mainboard/gigabyte/ma78gm/mainboard.c
index ff52b7b525..1fe75dfd1b 100644
--- a/src/mainboard/gigabyte/ma78gm/mainboard.c
+++ b/src/mainboard/gigabyte/ma78gm/mainboard.c
@@ -18,6 +18,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <southbridge/amd/sb700/sb700.h>
#include <southbridge/amd/sb700/smbus.h>
diff --git a/src/mainboard/gigabyte/ma78gm/mptable.c b/src/mainboard/gigabyte/ma78gm/mptable.c
index 895b747f2e..8c6ecf3747 100644
--- a/src/mainboard/gigabyte/ma78gm/mptable.c
+++ b/src/mainboard/gigabyte/ma78gm/mptable.c
@@ -16,6 +16,7 @@
#include <arch/smp/mpspec.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/gizmosphere/gizmo2/romstage.c b/src/mainboard/gizmosphere/gizmo2/romstage.c
index 283bea10f6..c6563470ad 100644
--- a/src/mainboard/gizmosphere/gizmo2/romstage.c
+++ b/src/mainboard/gizmosphere/gizmo2/romstage.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
diff --git a/src/mainboard/google/auron/variants/buddy/variant.c b/src/mainboard/google/auron/variants/buddy/variant.c
index 23942fb38e..d072fd9cc7 100644
--- a/src/mainboard/google/auron/variants/buddy/variant.c
+++ b/src/mainboard/google/auron/variants/buddy/variant.c
@@ -16,6 +16,7 @@
#include <types.h>
#include <string.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/mainboard/google/beltino/chromeos.c b/src/mainboard/google/beltino/chromeos.c
index 0be19fa7b9..0d7406d01a 100644
--- a/src/mainboard/google/beltino/chromeos.c
+++ b/src/mainboard/google/beltino/chromeos.c
@@ -15,6 +15,7 @@
#include <string.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <bootmode.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/mainboard/google/beltino/lan.c b/src/mainboard/google/beltino/lan.c
index 140c814cbe..1d0bc43d84 100644
--- a/src/mainboard/google/beltino/lan.c
+++ b/src/mainboard/google/beltino/lan.c
@@ -17,6 +17,7 @@
#include <string.h>
#include <types.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/mainboard/google/butterfly/chromeos.c b/src/mainboard/google/butterfly/chromeos.c
index da137b0080..6aebaeb003 100644
--- a/src/mainboard/google/butterfly/chromeos.c
+++ b/src/mainboard/google/butterfly/chromeos.c
@@ -17,6 +17,7 @@
#include <string.h>
#include <bootmode.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c
index 0166997436..cb3f1395fe 100644
--- a/src/mainboard/google/butterfly/romstage.c
+++ b/src/mainboard/google/butterfly/romstage.c
@@ -18,6 +18,7 @@
#include <string.h>
#include <timestamp.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
#include <arch/acpi.h>
diff --git a/src/mainboard/google/cyan/com_init.c b/src/mainboard/google/cyan/com_init.c
index 3560a0f097..e4fe6bed51 100644
--- a/src/mainboard/google/cyan/com_init.c
+++ b/src/mainboard/google/cyan/com_init.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <soc/gpio.h>
#include <soc/lpc.h>
#include <soc/pci_devs.h>
diff --git a/src/mainboard/google/jecht/chromeos.c b/src/mainboard/google/jecht/chromeos.c
index d7e48a0d40..1e8ea9463f 100644
--- a/src/mainboard/google/jecht/chromeos.c
+++ b/src/mainboard/google/jecht/chromeos.c
@@ -15,6 +15,7 @@
#include <string.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
#include <vendorcode/google/chromeos/chromeos.h>
diff --git a/src/mainboard/google/jecht/lan.c b/src/mainboard/google/jecht/lan.c
index 59ed1114a7..9735ca01ad 100644
--- a/src/mainboard/google/jecht/lan.c
+++ b/src/mainboard/google/jecht/lan.c
@@ -18,6 +18,7 @@
#include <types.h>
#include <string.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/mainboard/google/kahlee/variants/baseboard/mainboard.c b/src/mainboard/google/kahlee/variants/baseboard/mainboard.c
index 71aca7381b..66007936c8 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/mainboard.c
+++ b/src/mainboard/google/kahlee/variants/baseboard/mainboard.c
@@ -20,6 +20,7 @@
#include <smbios.h>
#include <variant/gpio.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <drivers/generic/bayhub/bh720.h>
uint8_t variant_board_sku(void)
diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c
index 91f8297cca..d9755bea99 100644
--- a/src/mainboard/google/link/romstage.c
+++ b/src/mainboard/google/link/romstage.c
@@ -18,6 +18,7 @@
#include <string.h>
#include <timestamp.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
diff --git a/src/mainboard/google/parrot/chromeos.c b/src/mainboard/google/parrot/chromeos.c
index bc605aaad4..6efd57afb2 100644
--- a/src/mainboard/google/parrot/chromeos.c
+++ b/src/mainboard/google/parrot/chromeos.c
@@ -17,6 +17,7 @@
#include <string.h>
#include <bootmode.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c
index 186d16d354..f6eb78a8a3 100644
--- a/src/mainboard/google/parrot/romstage.c
+++ b/src/mainboard/google/parrot/romstage.c
@@ -18,6 +18,7 @@
#include <string.h>
#include <timestamp.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
#include <arch/acpi.h>
diff --git a/src/mainboard/google/poppy/variants/nautilus/mainboard.c b/src/mainboard/google/poppy/variants/nautilus/mainboard.c
index bacf1a4c32..f11bde41f5 100644
--- a/src/mainboard/google/poppy/variants/nautilus/mainboard.c
+++ b/src/mainboard/google/poppy/variants/nautilus/mainboard.c
@@ -17,6 +17,7 @@
#include <chip.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <smbios.h>
#include <string.h>
#include <variant/sku.h>
diff --git a/src/mainboard/google/rambi/variants/ninja/lan.c b/src/mainboard/google/rambi/variants/ninja/lan.c
index 3d08ad7835..87df672c67 100644
--- a/src/mainboard/google/rambi/variants/ninja/lan.c
+++ b/src/mainboard/google/rambi/variants/ninja/lan.c
@@ -17,6 +17,7 @@
#include <string.h>
#include <types.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/mainboard/google/rambi/variants/sumo/lan.c b/src/mainboard/google/rambi/variants/sumo/lan.c
index 07fe3d96b0..5dae431297 100644
--- a/src/mainboard/google/rambi/variants/sumo/lan.c
+++ b/src/mainboard/google/rambi/variants/sumo/lan.c
@@ -17,6 +17,7 @@
#include <string.h>
#include <types.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/mainboard/google/stout/chromeos.c b/src/mainboard/google/stout/chromeos.c
index 5301d30b67..090cd6c0d7 100644
--- a/src/mainboard/google/stout/chromeos.c
+++ b/src/mainboard/google/stout/chromeos.c
@@ -16,6 +16,7 @@
#include <string.h>
#include <bootmode.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/mainboard/google/stout/mainboard_smi.c b/src/mainboard/google/stout/mainboard_smi.c
index 6a516455a1..77d7a05361 100644
--- a/src/mainboard/google/stout/mainboard_smi.c
+++ b/src/mainboard/google/stout/mainboard_smi.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/bd82x6x/nvs.h>
diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c
index d212951bba..ab25b14467 100644
--- a/src/mainboard/google/stout/romstage.c
+++ b/src/mainboard/google/stout/romstage.c
@@ -18,6 +18,7 @@
#include <string.h>
#include <timestamp.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
#include <arch/acpi.h>
diff --git a/src/mainboard/hp/2570p/romstage.c b/src/mainboard/hp/2570p/romstage.c
index b2095b9071..0d6e65c230 100644
--- a/src/mainboard/hp/2570p/romstage.c
+++ b/src/mainboard/hp/2570p/romstage.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/hp/2760p/romstage.c b/src/mainboard/hp/2760p/romstage.c
index c6d9a7c535..92a935ac31 100644
--- a/src/mainboard/hp/2760p/romstage.c
+++ b/src/mainboard/hp/2760p/romstage.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/hp/8460p/romstage.c b/src/mainboard/hp/8460p/romstage.c
index b97d5e4710..dd95def916 100644
--- a/src/mainboard/hp/8460p/romstage.c
+++ b/src/mainboard/hp/8460p/romstage.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/hp/8470p/romstage.c b/src/mainboard/hp/8470p/romstage.c
index bb9298ca9b..7e18fb23b4 100644
--- a/src/mainboard/hp/8470p/romstage.c
+++ b/src/mainboard/hp/8470p/romstage.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/hp/8770w/romstage.c b/src/mainboard/hp/8770w/romstage.c
index 75c2db01ce..6cce3312d8 100644
--- a/src/mainboard/hp/8770w/romstage.c
+++ b/src/mainboard/hp/8770w/romstage.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/hp/abm/romstage.c b/src/mainboard/hp/abm/romstage.c
index 6b5410357b..2cc8d1bead 100644
--- a/src/mainboard/hp/abm/romstage.c
+++ b/src/mainboard/hp/abm/romstage.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
#include <superio/nuvoton/common/nuvoton.h>
diff --git a/src/mainboard/hp/compaq_8200_elite_sff/romstage.c b/src/mainboard/hp/compaq_8200_elite_sff/romstage.c
index 49bce1c634..3ad60eb6b9 100644
--- a/src/mainboard/hp/compaq_8200_elite_sff/romstage.c
+++ b/src/mainboard/hp/compaq_8200_elite_sff/romstage.c
@@ -19,6 +19,7 @@
#include <stdint.h>
#include <arch/byteorder.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <superio/nuvoton/npcd378/npcd378.h>
#include <superio/nuvoton/common/nuvoton.h>
diff --git a/src/mainboard/hp/dl165_g6_fam10/get_bus_conf.c b/src/mainboard/hp/dl165_g6_fam10/get_bus_conf.c
index 4a5c6105e1..e217aa7138 100644
--- a/src/mainboard/hp/dl165_g6_fam10/get_bus_conf.c
+++ b/src/mainboard/hp/dl165_g6_fam10/get_bus_conf.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/multicore.h>
diff --git a/src/mainboard/hp/dl165_g6_fam10/mptable.c b/src/mainboard/hp/dl165_g6_fam10/mptable.c
index 6c9a00127c..f6c72dadb3 100644
--- a/src/mainboard/hp/dl165_g6_fam10/mptable.c
+++ b/src/mainboard/hp/dl165_g6_fam10/mptable.c
@@ -26,6 +26,7 @@
#include <console/console.h>
#include <arch/smp/mpspec.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci.h>
#include <string.h>
#include <stdint.h>
diff --git a/src/mainboard/hp/dl165_g6_fam10/romstage.c b/src/mainboard/hp/dl165_g6_fam10/romstage.c
index 6d2eed4dce..7eaff5705f 100644
--- a/src/mainboard/hp/dl165_g6_fam10/romstage.c
+++ b/src/mainboard/hp/dl165_g6_fam10/romstage.c
@@ -25,6 +25,7 @@
#include <string.h>
#include <device/pci_def.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include "option_table.h"
diff --git a/src/mainboard/hp/folio_9470m/romstage.c b/src/mainboard/hp/folio_9470m/romstage.c
index 1994c4fa37..5230245d62 100644
--- a/src/mainboard/hp/folio_9470m/romstage.c
+++ b/src/mainboard/hp/folio_9470m/romstage.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/hp/revolve_810_g1/romstage.c b/src/mainboard/hp/revolve_810_g1/romstage.c
index c70660aee9..9925709d7a 100644
--- a/src/mainboard/hp/revolve_810_g1/romstage.c
+++ b/src/mainboard/hp/revolve_810_g1/romstage.c
@@ -19,6 +19,7 @@
#include <cbfs.h>
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/ibase/mb899/romstage.c b/src/mainboard/ibase/mb899/romstage.c
index 9eaa8de57b..fd0db728f0 100644
--- a/src/mainboard/ibase/mb899/romstage.c
+++ b/src/mainboard/ibase/mb899/romstage.c
@@ -18,6 +18,7 @@
#include <stdint.h>
#include <halt.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/intel/romstage.h>
#include <cpu/x86/bist.h>
diff --git a/src/mainboard/iei/kino-780am2-fam10/mptable.c b/src/mainboard/iei/kino-780am2-fam10/mptable.c
index 895b747f2e..8c6ecf3747 100644
--- a/src/mainboard/iei/kino-780am2-fam10/mptable.c
+++ b/src/mainboard/iei/kino-780am2-fam10/mptable.c
@@ -16,6 +16,7 @@
#include <arch/smp/mpspec.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/intel/baskingridge/chromeos.c b/src/mainboard/intel/baskingridge/chromeos.c
index 0e58959081..69e1050101 100644
--- a/src/mainboard/intel/baskingridge/chromeos.c
+++ b/src/mainboard/intel/baskingridge/chromeos.c
@@ -16,6 +16,7 @@
#include <string.h>
#include <bootmode.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
#include <southbridge/intel/lynxpoint/pch.h>
diff --git a/src/mainboard/intel/d510mo/romstage.c b/src/mainboard/intel/d510mo/romstage.c
index 550bac5dd5..aadd833709 100644
--- a/src/mainboard/intel/d510mo/romstage.c
+++ b/src/mainboard/intel/d510mo/romstage.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <southbridge/intel/i82801gx/i82801gx.h>
#include <northbridge/intel/pineview/pineview.h>
#include <superio/winbond/w83627thg/w83627thg.h>
diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c
index 426ee69e35..44f785f226 100644
--- a/src/mainboard/intel/d945gclf/romstage.c
+++ b/src/mainboard/intel/d945gclf/romstage.c
@@ -18,6 +18,7 @@
#include <stdint.h>
#include <device/pci_def.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cpu/x86/lapic.h>
#include <superio/smsc/lpc47m15x/lpc47m15x.h>
#include <console/console.h>
diff --git a/src/mainboard/intel/dcp847ske/early_southbridge.c b/src/mainboard/intel/dcp847ske/early_southbridge.c
index c4be4d50fd..233800a818 100644
--- a/src/mainboard/intel/dcp847ske/early_southbridge.c
+++ b/src/mainboard/intel/dcp847ske/early_southbridge.c
@@ -19,6 +19,7 @@
#include <stdint.h>
#include <halt.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <arch/acpi.h>
#include <console/console.h>
diff --git a/src/mainboard/intel/dg41wv/romstage.c b/src/mainboard/intel/dg41wv/romstage.c
index 2caf5ec4d7..64e8dd9ca3 100644
--- a/src/mainboard/intel/dg41wv/romstage.c
+++ b/src/mainboard/intel/dg41wv/romstage.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/intel/romstage.h>
#include <cpu/x86/bist.h>
diff --git a/src/mainboard/intel/dg43gt/romstage.c b/src/mainboard/intel/dg43gt/romstage.c
index c16160e276..6a93cea7bf 100644
--- a/src/mainboard/intel/dg43gt/romstage.c
+++ b/src/mainboard/intel/dg43gt/romstage.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <southbridge/intel/i82801jx/i82801jx.h>
#include <southbridge/intel/common/gpio.h>
diff --git a/src/mainboard/intel/emeraldlake2/chromeos.c b/src/mainboard/intel/emeraldlake2/chromeos.c
index 8967a21d32..24f887598f 100644
--- a/src/mainboard/intel/emeraldlake2/chromeos.c
+++ b/src/mainboard/intel/emeraldlake2/chromeos.c
@@ -16,6 +16,7 @@
#include <string.h>
#include <bootmode.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c
index b43a9b0c07..4074a30673 100644
--- a/src/mainboard/intel/emeraldlake2/romstage.c
+++ b/src/mainboard/intel/emeraldlake2/romstage.c
@@ -18,6 +18,7 @@
#include <string.h>
#include <timestamp.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
#include <arch/acpi.h>
diff --git a/src/mainboard/intel/littleplains/romstage.c b/src/mainboard/intel/littleplains/romstage.c
index 1925c7811e..3f97c82657 100644
--- a/src/mainboard/intel/littleplains/romstage.c
+++ b/src/mainboard/intel/littleplains/romstage.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
#include <drivers/intel/fsp1_0/fsp_util.h>
diff --git a/src/mainboard/intel/mohonpeak/romstage.c b/src/mainboard/intel/mohonpeak/romstage.c
index 1925c7811e..3f97c82657 100644
--- a/src/mainboard/intel/mohonpeak/romstage.c
+++ b/src/mainboard/intel/mohonpeak/romstage.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
#include <drivers/intel/fsp1_0/fsp_util.h>
diff --git a/src/mainboard/intel/strago/com_init.c b/src/mainboard/intel/strago/com_init.c
index 36cd1c1439..e1e6476ed4 100644
--- a/src/mainboard/intel/strago/com_init.c
+++ b/src/mainboard/intel/strago/com_init.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <soc/gpio.h>
#include <soc/lpc.h>
#include <soc/pci_devs.h>
diff --git a/src/mainboard/jetway/pa78vm5/mainboard.c b/src/mainboard/jetway/pa78vm5/mainboard.c
index 444cd33494..e2d39dadbf 100644
--- a/src/mainboard/jetway/pa78vm5/mainboard.c
+++ b/src/mainboard/jetway/pa78vm5/mainboard.c
@@ -18,6 +18,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <southbridge/amd/sb700/sb700.h>
#include <southbridge/amd/sb700/smbus.h>
diff --git a/src/mainboard/jetway/pa78vm5/mptable.c b/src/mainboard/jetway/pa78vm5/mptable.c
index db94b02bd0..08df9434d2 100644
--- a/src/mainboard/jetway/pa78vm5/mptable.c
+++ b/src/mainboard/jetway/pa78vm5/mptable.c
@@ -17,6 +17,7 @@
#include <arch/smp/mpspec.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c
index fda8f97848..0777412a0f 100644
--- a/src/mainboard/kontron/986lcd-m/romstage.c
+++ b/src/mainboard/kontron/986lcd-m/romstage.c
@@ -22,6 +22,7 @@
#include <cpu/x86/bist.h>
#include <cpu/x86/lapic.h>
#include <device/pci_def.h>
+#include <device/pci_ops.h>
#include <device/pnp_def.h>
#include <pc80/mc146818rtc.h>
#include <northbridge/intel/i945/i945.h>
diff --git a/src/mainboard/kontron/ktqm77/romstage.c b/src/mainboard/kontron/ktqm77/romstage.c
index ea93e05379..533309950c 100644
--- a/src/mainboard/kontron/ktqm77/romstage.c
+++ b/src/mainboard/kontron/ktqm77/romstage.c
@@ -18,6 +18,7 @@
#include <string.h>
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/msr.h>
#include <device/pci_def.h>
diff --git a/src/mainboard/lenovo/l520/romstage.c b/src/mainboard/lenovo/l520/romstage.c
index d9e021b408..c2539b178a 100644
--- a/src/mainboard/lenovo/l520/romstage.c
+++ b/src/mainboard/lenovo/l520/romstage.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
diff --git a/src/mainboard/lenovo/s230u/romstage.c b/src/mainboard/lenovo/s230u/romstage.c
index beeb96dc8d..ef3c835ed3 100644
--- a/src/mainboard/lenovo/s230u/romstage.c
+++ b/src/mainboard/lenovo/s230u/romstage.c
@@ -18,6 +18,7 @@
#include <cbfs.h>
#include <arch/byteorder.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <console/console.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
diff --git a/src/mainboard/lenovo/t400/fadt.c b/src/mainboard/lenovo/t400/fadt.c
index d22ffd9b38..45c0d74222 100644
--- a/src/mainboard/lenovo/t400/fadt.c
+++ b/src/mainboard/lenovo/t400/fadt.c
@@ -16,6 +16,7 @@
#include <string.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <arch/acpi.h>
#include <cpu/x86/smm.h>
#include <version.h>
diff --git a/src/mainboard/lenovo/t400/romstage.c b/src/mainboard/lenovo/t400/romstage.c
index 9f8993c5be..0be24ebdce 100644
--- a/src/mainboard/lenovo/t400/romstage.c
+++ b/src/mainboard/lenovo/t400/romstage.c
@@ -17,6 +17,7 @@
// __PRE_RAM__ means: use "unsigned" for device, not a struct.
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <southbridge/intel/i82801ix/i82801ix.h>
#include <southbridge/intel/common/gpio.h>
diff --git a/src/mainboard/lenovo/t420/romstage.c b/src/mainboard/lenovo/t420/romstage.c
index aad83489dd..d497e0ca18 100644
--- a/src/mainboard/lenovo/t420/romstage.c
+++ b/src/mainboard/lenovo/t420/romstage.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <drivers/lenovo/hybrid_graphics/hybrid_graphics.h>
diff --git a/src/mainboard/lenovo/t420s/romstage.c b/src/mainboard/lenovo/t420s/romstage.c
index 5754a6dc2f..1a7d341959 100644
--- a/src/mainboard/lenovo/t420s/romstage.c
+++ b/src/mainboard/lenovo/t420s/romstage.c
@@ -17,6 +17,7 @@
#include <arch/byteorder.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <drivers/lenovo/hybrid_graphics/hybrid_graphics.h>
diff --git a/src/mainboard/lenovo/t420s/smihandler.c b/src/mainboard/lenovo/t420s/smihandler.c
index 0e8e6d071a..be4228dc90 100644
--- a/src/mainboard/lenovo/t420s/smihandler.c
+++ b/src/mainboard/lenovo/t420s/smihandler.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <ec/acpi/ec.h>
diff --git a/src/mainboard/lenovo/t430/romstage.c b/src/mainboard/lenovo/t430/romstage.c
index 90d0886af1..b5dc2bc7af 100644
--- a/src/mainboard/lenovo/t430/romstage.c
+++ b/src/mainboard/lenovo/t430/romstage.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/lenovo/t430s/romstage.c b/src/mainboard/lenovo/t430s/romstage.c
index ab2bb0a442..4edd5c6131 100644
--- a/src/mainboard/lenovo/t430s/romstage.c
+++ b/src/mainboard/lenovo/t430s/romstage.c
@@ -15,6 +15,7 @@
* GNU General Public License for more details.
*/
+#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/lenovo/t430s/smihandler.c b/src/mainboard/lenovo/t430s/smihandler.c
index d69f6b6f7c..876d81c0d7 100644
--- a/src/mainboard/lenovo/t430s/smihandler.c
+++ b/src/mainboard/lenovo/t430s/smihandler.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <ec/acpi/ec.h>
diff --git a/src/mainboard/lenovo/t430s/variants/t430s/romstage.c b/src/mainboard/lenovo/t430s/variants/t430s/romstage.c
index 1b1c4b2b79..33d65dd5ab 100644
--- a/src/mainboard/lenovo/t430s/variants/t430s/romstage.c
+++ b/src/mainboard/lenovo/t430s/variants/t430s/romstage.c
@@ -18,6 +18,7 @@
#include <option.h>
#include <arch/byteorder.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/lenovo/t520/romstage.c b/src/mainboard/lenovo/t520/romstage.c
index b7bdbbbd71..6f9525053a 100644
--- a/src/mainboard/lenovo/t520/romstage.c
+++ b/src/mainboard/lenovo/t520/romstage.c
@@ -18,6 +18,7 @@
#include <stdint.h>
#include <arch/byteorder.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
diff --git a/src/mainboard/lenovo/t520/smihandler.c b/src/mainboard/lenovo/t520/smihandler.c
index f8400dd670..88ce5046fc 100644
--- a/src/mainboard/lenovo/t520/smihandler.c
+++ b/src/mainboard/lenovo/t520/smihandler.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <ec/acpi/ec.h>
diff --git a/src/mainboard/lenovo/t530/romstage.c b/src/mainboard/lenovo/t530/romstage.c
index 065cff69ee..d37f0d14c1 100644
--- a/src/mainboard/lenovo/t530/romstage.c
+++ b/src/mainboard/lenovo/t530/romstage.c
@@ -18,6 +18,7 @@
#include <stdint.h>
#include <arch/byteorder.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/lenovo/t530/smihandler.c b/src/mainboard/lenovo/t530/smihandler.c
index 150232f354..bf0f81fc57 100644
--- a/src/mainboard/lenovo/t530/smihandler.c
+++ b/src/mainboard/lenovo/t530/smihandler.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <ec/acpi/ec.h>
diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c
index 3017357235..a8efa9940d 100644
--- a/src/mainboard/lenovo/t60/romstage.c
+++ b/src/mainboard/lenovo/t60/romstage.c
@@ -20,6 +20,7 @@
#include <stdint.h>
#include <string.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
diff --git a/src/mainboard/lenovo/t60/smihandler.c b/src/mainboard/lenovo/t60/smihandler.c
index aa29984ef4..51ced894be 100644
--- a/src/mainboard/lenovo/t60/smihandler.c
+++ b/src/mainboard/lenovo/t60/smihandler.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/i82801gx/nvs.h>
diff --git a/src/mainboard/lenovo/thinkcentre_a58/romstage.c b/src/mainboard/lenovo/thinkcentre_a58/romstage.c
index cac09d104c..f377c895a1 100644
--- a/src/mainboard/lenovo/thinkcentre_a58/romstage.c
+++ b/src/mainboard/lenovo/thinkcentre_a58/romstage.c
@@ -21,6 +21,7 @@
#include <northbridge/intel/x4x/x4x.h>
#include <cpu/x86/bist.h>
#include <cpu/intel/romstage.h>
+#include <device/pci_ops.h>
#include <superio/smsc/smscsuperio/smscsuperio.h>
#include <northbridge/intel/x4x/iomap.h>
diff --git a/src/mainboard/lenovo/x131e/romstage.c b/src/mainboard/lenovo/x131e/romstage.c
index 43e0bd7dfb..c1a082f01f 100644
--- a/src/mainboard/lenovo/x131e/romstage.c
+++ b/src/mainboard/lenovo/x131e/romstage.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/lenovo/x1_carbon_gen1/romstage.c b/src/mainboard/lenovo/x1_carbon_gen1/romstage.c
index 7f6181b3f4..fa7af40521 100644
--- a/src/mainboard/lenovo/x1_carbon_gen1/romstage.c
+++ b/src/mainboard/lenovo/x1_carbon_gen1/romstage.c
@@ -21,6 +21,7 @@
#include <timestamp.h>
#include <arch/byteorder.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
#include <arch/acpi.h>
diff --git a/src/mainboard/lenovo/x200/dock.c b/src/mainboard/lenovo/x200/dock.c
index dc5eabf372..6e87644302 100644
--- a/src/mainboard/lenovo/x200/dock.c
+++ b/src/mainboard/lenovo/x200/dock.c
@@ -18,6 +18,7 @@
#define __SIMPLE_DEVICE__
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
#include <delay.h>
diff --git a/src/mainboard/lenovo/x200/fadt.c b/src/mainboard/lenovo/x200/fadt.c
index d22ffd9b38..45c0d74222 100644
--- a/src/mainboard/lenovo/x200/fadt.c
+++ b/src/mainboard/lenovo/x200/fadt.c
@@ -16,6 +16,7 @@
#include <string.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <arch/acpi.h>
#include <cpu/x86/smm.h>
#include <version.h>
diff --git a/src/mainboard/lenovo/x200/romstage.c b/src/mainboard/lenovo/x200/romstage.c
index e8bbfb09fd..7e428e40fa 100644
--- a/src/mainboard/lenovo/x200/romstage.c
+++ b/src/mainboard/lenovo/x200/romstage.c
@@ -17,6 +17,7 @@
// __PRE_RAM__ means: use "unsigned" for device, not a struct.
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <southbridge/intel/common/gpio.h>
#include <southbridge/intel/i82801ix/i82801ix.h>
#include <northbridge/intel/gm45/gm45.h>
diff --git a/src/mainboard/lenovo/x201/dock.c b/src/mainboard/lenovo/x201/dock.c
index a25fc70fba..04050f2d35 100644
--- a/src/mainboard/lenovo/x201/dock.c
+++ b/src/mainboard/lenovo/x201/dock.c
@@ -18,6 +18,7 @@
#define __SIMPLE_DEVICE__
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
#include "dock.h"
diff --git a/src/mainboard/lenovo/x201/mainboard.c b/src/mainboard/lenovo/x201/mainboard.c
index eb686f48c7..5347429bde 100644
--- a/src/mainboard/lenovo/x201/mainboard.c
+++ b/src/mainboard/lenovo/x201/mainboard.c
@@ -19,6 +19,7 @@
#include <console/console.h>
#include <device/device.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <ec/acpi/ec.h>
#include <northbridge/intel/nehalem/nehalem.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c
index 601c4aed05..caaeffc0d7 100644
--- a/src/mainboard/lenovo/x201/romstage.c
+++ b/src/mainboard/lenovo/x201/romstage.c
@@ -21,6 +21,7 @@
#include <stdint.h>
#include <string.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
#include <lib.h>
diff --git a/src/mainboard/lenovo/x201/smihandler.c b/src/mainboard/lenovo/x201/smihandler.c
index f1e2c3f9b0..e733b3b5fe 100644
--- a/src/mainboard/lenovo/x201/smihandler.c
+++ b/src/mainboard/lenovo/x201/smihandler.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/ibexpeak/nvs.h>
diff --git a/src/mainboard/lenovo/x220/romstage.c b/src/mainboard/lenovo/x220/romstage.c
index 2d6c2a78f3..a5b1b52c57 100644
--- a/src/mainboard/lenovo/x220/romstage.c
+++ b/src/mainboard/lenovo/x220/romstage.c
@@ -20,6 +20,7 @@
#include <timestamp.h>
#include <arch/byteorder.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
#include <arch/acpi.h>
diff --git a/src/mainboard/lenovo/x220/smihandler.c b/src/mainboard/lenovo/x220/smihandler.c
index 150232f354..bf0f81fc57 100644
--- a/src/mainboard/lenovo/x220/smihandler.c
+++ b/src/mainboard/lenovo/x220/smihandler.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <ec/acpi/ec.h>
diff --git a/src/mainboard/lenovo/x230/romstage.c b/src/mainboard/lenovo/x230/romstage.c
index 6a47ac0374..5014a7627b 100644
--- a/src/mainboard/lenovo/x230/romstage.c
+++ b/src/mainboard/lenovo/x230/romstage.c
@@ -20,6 +20,7 @@
#include <timestamp.h>
#include <arch/byteorder.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
#include <arch/acpi.h>
diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c
index 6f66c88c96..4a9757d9be 100644
--- a/src/mainboard/lenovo/x60/romstage.c
+++ b/src/mainboard/lenovo/x60/romstage.c
@@ -20,6 +20,7 @@
#include <stdint.h>
#include <string.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
diff --git a/src/mainboard/lenovo/x60/smihandler.c b/src/mainboard/lenovo/x60/smihandler.c
index 3c8565d496..18e5046289 100644
--- a/src/mainboard/lenovo/x60/smihandler.c
+++ b/src/mainboard/lenovo/x60/smihandler.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/i82801gx/nvs.h>
diff --git a/src/mainboard/lenovo/z61t/romstage.c b/src/mainboard/lenovo/z61t/romstage.c
index 6eceaeb77d..33700fe3fe 100644
--- a/src/mainboard/lenovo/z61t/romstage.c
+++ b/src/mainboard/lenovo/z61t/romstage.c
@@ -20,6 +20,7 @@
#include <stdint.h>
#include <string.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <device/pnp_def.h>
#include <cpu/x86/lapic.h>
diff --git a/src/mainboard/lenovo/z61t/smihandler.c b/src/mainboard/lenovo/z61t/smihandler.c
index 4f622241a6..eacbd5e077 100644
--- a/src/mainboard/lenovo/z61t/smihandler.c
+++ b/src/mainboard/lenovo/z61t/smihandler.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <southbridge/intel/i82801gx/nvs.h>
diff --git a/src/mainboard/lippert/frontrunner-af/mainboard.c b/src/mainboard/lippert/frontrunner-af/mainboard.c
index 9660a73ed5..cdd3f80f6d 100644
--- a/src/mainboard/lippert/frontrunner-af/mainboard.c
+++ b/src/mainboard/lippert/frontrunner-af/mainboard.c
@@ -18,6 +18,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <southbridge/amd/sb800/sb800.h>
#include <arch/acpi.h>
diff --git a/src/mainboard/lippert/toucan-af/mainboard.c b/src/mainboard/lippert/toucan-af/mainboard.c
index 5cb0916244..ddea58d409 100644
--- a/src/mainboard/lippert/toucan-af/mainboard.c
+++ b/src/mainboard/lippert/toucan-af/mainboard.c
@@ -18,6 +18,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <southbridge/amd/sb800/sb800.h>
#include <arch/acpi.h>
diff --git a/src/mainboard/msi/ms7721/romstage.c b/src/mainboard/msi/ms7721/romstage.c
index ed1e7d487e..1fa2fd8b0b 100644
--- a/src/mainboard/msi/ms7721/romstage.c
+++ b/src/mainboard/msi/ms7721/romstage.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pnp.h>
#include <stdint.h>
diff --git a/src/mainboard/msi/ms9652_fam10/get_bus_conf.c b/src/mainboard/msi/ms9652_fam10/get_bus_conf.c
index a56242fa4e..8c7f921041 100644
--- a/src/mainboard/msi/ms9652_fam10/get_bus_conf.c
+++ b/src/mainboard/msi/ms9652_fam10/get_bus_conf.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/multicore.h>
diff --git a/src/mainboard/msi/ms9652_fam10/mptable.c b/src/mainboard/msi/ms9652_fam10/mptable.c
index 63816dc977..f3947e7b60 100644
--- a/src/mainboard/msi/ms9652_fam10/mptable.c
+++ b/src/mainboard/msi/ms9652_fam10/mptable.c
@@ -17,6 +17,7 @@
#include <arch/smp/mpspec.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c
index b5acf36c46..2316a054a5 100644
--- a/src/mainboard/msi/ms9652_fam10/romstage.c
+++ b/src/mainboard/msi/ms9652_fam10/romstage.c
@@ -20,6 +20,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/ocp/wedge100s/romstage.c b/src/mainboard/ocp/wedge100s/romstage.c
index e14a09f5ef..b8da280e9b 100644
--- a/src/mainboard/ocp/wedge100s/romstage.c
+++ b/src/mainboard/ocp/wedge100s/romstage.c
@@ -20,6 +20,7 @@
#include <cpu/x86/msr.h>
#include <cf9_reset.h>
#include <console/console.h>
+#include <device/pci_ops.h>
#include <soc/pci_devs.h>
#include <soc/lpc.h>
#include <superio/ite/common/ite.h>
diff --git a/src/mainboard/packardbell/ms2290/romstage.c b/src/mainboard/packardbell/ms2290/romstage.c
index 992da7b177..88589b0e49 100644
--- a/src/mainboard/packardbell/ms2290/romstage.c
+++ b/src/mainboard/packardbell/ms2290/romstage.c
@@ -21,6 +21,7 @@
#include <stdint.h>
#include <string.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
#include <lib.h>
diff --git a/src/mainboard/packardbell/ms2290/smihandler.c b/src/mainboard/packardbell/ms2290/smihandler.c
index e0f16f3236..e4c29b1d70 100644
--- a/src/mainboard/packardbell/ms2290/smihandler.c
+++ b/src/mainboard/packardbell/ms2290/smihandler.c
@@ -16,6 +16,7 @@
#include <console/console.h>
#include <cpu/x86/smm.h>
+#include <device/pci_ops.h>
#include <southbridge/intel/ibexpeak/nvs.h>
#include <southbridge/intel/ibexpeak/pch.h>
#include <southbridge/intel/ibexpeak/me.h>
diff --git a/src/mainboard/pcengines/apu1/mainboard.c b/src/mainboard/pcengines/apu1/mainboard.c
index a9ce66b90f..3b7d0f5f73 100644
--- a/src/mainboard/pcengines/apu1/mainboard.c
+++ b/src/mainboard/pcengines/apu1/mainboard.c
@@ -18,6 +18,7 @@
#include <device/device.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <southbridge/amd/common/amd_pci_util.h>
#include <southbridge/amd/cimx/cimx_util.h>
diff --git a/src/mainboard/pcengines/apu2/mainboard.c b/src/mainboard/pcengines/apu2/mainboard.c
index b875437493..e8b52dd632 100644
--- a/src/mainboard/pcengines/apu2/mainboard.c
+++ b/src/mainboard/pcengines/apu2/mainboard.c
@@ -15,6 +15,7 @@
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/mainboard/pcengines/apu2/romstage.c b/src/mainboard/pcengines/apu2/romstage.c
index 6c405b84dc..49281b905a 100644
--- a/src/mainboard/pcengines/apu2/romstage.c
+++ b/src/mainboard/pcengines/apu2/romstage.c
@@ -17,6 +17,7 @@
#include <string.h>
#include <device/pci_def.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pnp.h>
#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c
index 3c42048487..9492ca1304 100644
--- a/src/mainboard/roda/rk886ex/romstage.c
+++ b/src/mainboard/roda/rk886ex/romstage.c
@@ -19,6 +19,7 @@
#include <stdint.h>
#include <string.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
#include <arch/acpi.h>
diff --git a/src/mainboard/roda/rk9/fadt.c b/src/mainboard/roda/rk9/fadt.c
index d22ffd9b38..45c0d74222 100644
--- a/src/mainboard/roda/rk9/fadt.c
+++ b/src/mainboard/roda/rk9/fadt.c
@@ -16,6 +16,7 @@
#include <string.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <arch/acpi.h>
#include <cpu/x86/smm.h>
#include <version.h>
diff --git a/src/mainboard/roda/rk9/romstage.c b/src/mainboard/roda/rk9/romstage.c
index 742e2eec85..a6adb17221 100644
--- a/src/mainboard/roda/rk9/romstage.c
+++ b/src/mainboard/roda/rk9/romstage.c
@@ -17,6 +17,7 @@
/* __PRE_RAM__ means: use "unsigned" for device, not a struct. */
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <southbridge/intel/common/gpio.h>
#include <southbridge/intel/i82801ix/i82801ix.h>
#include <northbridge/intel/gm45/gm45.h>
diff --git a/src/mainboard/roda/rk9/ti_pci7xx1.c b/src/mainboard/roda/rk9/ti_pci7xx1.c
index 4f72f9d829..9f8e53ee2e 100644
--- a/src/mainboard/roda/rk9/ti_pci7xx1.c
+++ b/src/mainboard/roda/rk9/ti_pci7xx1.c
@@ -18,6 +18,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/cardbus.h>
static void pci7xx1_enable(struct device *const dev)
diff --git a/src/mainboard/roda/rv11/variants/rv11/romstage.c b/src/mainboard/roda/rv11/variants/rv11/romstage.c
index c7de994760..685e94237f 100644
--- a/src/mainboard/roda/rv11/variants/rv11/romstage.c
+++ b/src/mainboard/roda/rv11/variants/rv11/romstage.c
@@ -15,6 +15,7 @@
#include <stdint.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/raminit.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
diff --git a/src/mainboard/roda/rv11/variants/rw11/romstage.c b/src/mainboard/roda/rv11/variants/rw11/romstage.c
index ca705a4dba..e693f13f5c 100644
--- a/src/mainboard/roda/rv11/variants/rw11/romstage.c
+++ b/src/mainboard/roda/rv11/variants/rw11/romstage.c
@@ -15,6 +15,7 @@
#include <stdint.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pnp.h>
#include <northbridge/intel/sandybridge/raminit.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
diff --git a/src/mainboard/samsung/lumpy/chromeos.c b/src/mainboard/samsung/lumpy/chromeos.c
index bc660b6bdc..cb709d132a 100644
--- a/src/mainboard/samsung/lumpy/chromeos.c
+++ b/src/mainboard/samsung/lumpy/chromeos.c
@@ -16,6 +16,7 @@
#include <string.h>
#include <bootmode.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c
index 9f6a6ba624..244ce7c10d 100644
--- a/src/mainboard/samsung/lumpy/romstage.c
+++ b/src/mainboard/samsung/lumpy/romstage.c
@@ -18,6 +18,7 @@
#include <string.h>
#include <timestamp.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
#include <cbfs.h>
diff --git a/src/mainboard/samsung/stumpy/chromeos.c b/src/mainboard/samsung/stumpy/chromeos.c
index f543da2256..d6ec1478dd 100644
--- a/src/mainboard/samsung/stumpy/chromeos.c
+++ b/src/mainboard/samsung/stumpy/chromeos.c
@@ -16,6 +16,7 @@
#include <string.h>
#include <bootmode.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c
index e6ba28c1df..27759a64e2 100644
--- a/src/mainboard/samsung/stumpy/romstage.c
+++ b/src/mainboard/samsung/stumpy/romstage.c
@@ -18,6 +18,7 @@
#include <string.h>
#include <timestamp.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
#include <pc80/mc146818rtc.h>
diff --git a/src/mainboard/sapphire/pureplatinumh61/romstage.c b/src/mainboard/sapphire/pureplatinumh61/romstage.c
index e9e962e9b3..1b74cbb00d 100644
--- a/src/mainboard/sapphire/pureplatinumh61/romstage.c
+++ b/src/mainboard/sapphire/pureplatinumh61/romstage.c
@@ -18,6 +18,7 @@
#include <string.h>
#include <arch/byteorder.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
diff --git a/src/mainboard/siemens/mc_apl1/mainboard.c b/src/mainboard/siemens/mc_apl1/mainboard.c
index 4305a24567..07d0fb14f2 100644
--- a/src/mainboard/siemens/mc_apl1/mainboard.c
+++ b/src/mainboard/siemens/mc_apl1/mainboard.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <hwilib.h>
#include <i210.h>
diff --git a/src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c b/src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c
index 5decd03fd1..0a1e816f23 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/get_bus_conf.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/multicore.h>
diff --git a/src/mainboard/supermicro/h8dmr_fam10/mptable.c b/src/mainboard/supermicro/h8dmr_fam10/mptable.c
index 90659656d8..8b96670220 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/mptable.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/mptable.c
@@ -17,6 +17,7 @@
#include <arch/smp/mpspec.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
index 18a4631b06..49fec53cc4 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
@@ -20,6 +20,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c b/src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c
index a94c9e4e7b..4f1fa4794c 100644
--- a/src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c
+++ b/src/mainboard/supermicro/h8qme_fam10/get_bus_conf.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/multicore.h>
diff --git a/src/mainboard/supermicro/h8qme_fam10/mptable.c b/src/mainboard/supermicro/h8qme_fam10/mptable.c
index 81c0c1acee..5d4c1cb8d3 100644
--- a/src/mainboard/supermicro/h8qme_fam10/mptable.c
+++ b/src/mainboard/supermicro/h8qme_fam10/mptable.c
@@ -17,6 +17,7 @@
#include <arch/smp/mpspec.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c
index e3dc87d3b4..f61fa718da 100644
--- a/src/mainboard/supermicro/h8qme_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c
@@ -20,6 +20,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/supermicro/h8scm_fam10/acpi_tables.c b/src/mainboard/supermicro/h8scm_fam10/acpi_tables.c
index 716a77f3f0..530a913401 100644
--- a/src/mainboard/supermicro/h8scm_fam10/acpi_tables.c
+++ b/src/mainboard/supermicro/h8scm_fam10/acpi_tables.c
@@ -17,6 +17,7 @@
#include <arch/acpi.h>
#include <arch/ioapic.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <cpu/amd/amdfam10_sysconf.h>
#include "mb_sysconf.h"
diff --git a/src/mainboard/supermicro/h8scm_fam10/get_bus_conf.c b/src/mainboard/supermicro/h8scm_fam10/get_bus_conf.c
index f6ea9334fc..3c0bf46e4a 100644
--- a/src/mainboard/supermicro/h8scm_fam10/get_bus_conf.c
+++ b/src/mainboard/supermicro/h8scm_fam10/get_bus_conf.c
@@ -14,6 +14,7 @@
*/
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <stdlib.h>
diff --git a/src/mainboard/supermicro/h8scm_fam10/mptable.c b/src/mainboard/supermicro/h8scm_fam10/mptable.c
index e28f422f51..1a8d191a5d 100644
--- a/src/mainboard/supermicro/h8scm_fam10/mptable.c
+++ b/src/mainboard/supermicro/h8scm_fam10/mptable.c
@@ -16,6 +16,7 @@
#include <arch/smp/mpspec.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/tyan/s2912_fam10/get_bus_conf.c b/src/mainboard/tyan/s2912_fam10/get_bus_conf.c
index 419b00b328..1cefda9285 100644
--- a/src/mainboard/tyan/s2912_fam10/get_bus_conf.c
+++ b/src/mainboard/tyan/s2912_fam10/get_bus_conf.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/multicore.h>
diff --git a/src/mainboard/tyan/s2912_fam10/mptable.c b/src/mainboard/tyan/s2912_fam10/mptable.c
index 928feb3233..f9062ca06b 100644
--- a/src/mainboard/tyan/s2912_fam10/mptable.c
+++ b/src/mainboard/tyan/s2912_fam10/mptable.c
@@ -17,6 +17,7 @@
#include <arch/smp/mpspec.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c
index babac6fe8e..589e06d3a9 100644
--- a/src/mainboard/tyan/s2912_fam10/romstage.c
+++ b/src/mainboard/tyan/s2912_fam10/romstage.c
@@ -20,6 +20,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/cpu.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
diff --git a/src/mainboard/via/epia-m850/romstage.c b/src/mainboard/via/epia-m850/romstage.c
index 8ce47349b1..7a0d824d17 100644
--- a/src/mainboard/via/epia-m850/romstage.c
+++ b/src/mainboard/via/epia-m850/romstage.c
@@ -18,9 +18,10 @@
* Inspired from the EPIA-M700
*/
#include <stdint.h>
-#include <device/pci_def.h>
#include <arch/io.h>
#include <console/console.h>
+#include <device/pci_ops.h>
+#include <device/pci_def.h>
#include <lib.h>
#include <cpu/x86/bist.h>
#include <string.h>
diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c
index f50a643ca2..243f5bb37f 100644
--- a/src/northbridge/amd/agesa/family12/northbridge.c
+++ b/src/northbridge/amd/agesa/family12/northbridge.c
@@ -17,6 +17,7 @@
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <stdint.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index 219970fc00..8e1c2ef782 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -15,6 +15,7 @@
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <stdint.h>
diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index edc4585c70..0e1092045c 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -16,6 +16,7 @@
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <stdint.h>
diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c
index b283094f07..d4c5c61c6a 100644
--- a/src/northbridge/amd/agesa/family16kb/northbridge.c
+++ b/src/northbridge/amd/agesa/family16kb/northbridge.c
@@ -15,6 +15,7 @@
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <stdint.h>
diff --git a/src/northbridge/amd/amdfam10/debug.c b/src/northbridge/amd/amdfam10/debug.c
index 55a00e1e7a..405a7009bc 100644
--- a/src/northbridge/amd/amdfam10/debug.c
+++ b/src/northbridge/amd/amdfam10/debug.c
@@ -16,6 +16,7 @@
#include "debug.h"
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <delay.h>
diff --git a/src/northbridge/amd/amdfam10/early_ht.c b/src/northbridge/amd/amdfam10/early_ht.c
index c68b0c44fa..7ace6b7694 100644
--- a/src/northbridge/amd/amdfam10/early_ht.c
+++ b/src/northbridge/amd/amdfam10/early_ht.c
@@ -16,6 +16,7 @@
#include "early_ht.h"
#include <inttypes.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
// For SB HT chain only
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index c0c6eeb2cd..8bf6d9ec32 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <stdint.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/northbridge/amd/amdfam10/pci.c b/src/northbridge/amd/amdfam10/pci.c
index 6c6d717cba..410923a01e 100644
--- a/src/northbridge/amd/amdfam10/pci.c
+++ b/src/northbridge/amd/amdfam10/pci.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <device/pci_ops.h>
#include "pci.h"
/* bit [10,8] are dev func, bit[1,0] are dev index */
diff --git a/src/northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c b/src/northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c
index dce205333f..218df75887 100644
--- a/src/northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c
+++ b/src/northbridge/amd/amdfam10/raminit_sysinfo_in_ram.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <device/pci_ops.h>
#include <northbridge/amd/amdfam10/raminit.h>
#include <northbridge/amd/amdfam10/amdfam10.h>
#include <delay.h>
diff --git a/src/northbridge/amd/amdfam10/reset_test.c b/src/northbridge/amd/amdfam10/reset_test.c
index 22f48b1ab7..76d1144e7d 100644
--- a/src/northbridge/amd/amdfam10/reset_test.c
+++ b/src/northbridge/amd/amdfam10/reset_test.c
@@ -15,6 +15,7 @@
#include <stdint.h>
#include <cpu/x86/lapic.h>
+#include <device/pci_ops.h>
#include <northbridge/amd/amdfam10/raminit.h>
#include <northbridge/amd/amdfam10/amdfam10.h>
diff --git a/src/northbridge/amd/amdfam10/setup_resource_map.c b/src/northbridge/amd/amdfam10/setup_resource_map.c
index 5984178522..38475f3874 100644
--- a/src/northbridge/amd/amdfam10/setup_resource_map.c
+++ b/src/northbridge/amd/amdfam10/setup_resource_map.c
@@ -16,6 +16,7 @@
#include <inttypes.h>
#include <console/console.h>
+#include <device/pci_ops.h>
#include <northbridge/amd/amdfam10/raminit.h>
#include <northbridge/amd/amdfam10/amdfam10.h>
diff --git a/src/northbridge/amd/amdht/comlib.c b/src/northbridge/amd/amdht/comlib.c
index 7d9a5477ae..3c2477c2ab 100644
--- a/src/northbridge/amd/amdht/comlib.c
+++ b/src/northbridge/amd/amdht/comlib.c
@@ -18,6 +18,7 @@
#include "comlib.h"
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/amd/msr.h>
#include <device/pci_def.h>
diff --git a/src/northbridge/amd/amdht/h3finit.c b/src/northbridge/amd/amdht/h3finit.c
index 436cb59dda..f919335360 100644
--- a/src/northbridge/amd/amdht/h3finit.c
+++ b/src/northbridge/amd/amdht/h3finit.c
@@ -29,6 +29,7 @@
#include <arch/cpu.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/lapic_def.h>
#include <cpu/amd/msr.h>
diff --git a/src/northbridge/amd/amdht/ht_wrapper.c b/src/northbridge/amd/amdht/ht_wrapper.c
index d005223d96..6552be9532 100644
--- a/src/northbridge/amd/amdht/ht_wrapper.c
+++ b/src/northbridge/amd/amdht/ht_wrapper.c
@@ -17,6 +17,7 @@
#include <arch/cpu.h>
#include <cpu/x86/msr.h>
#include <console/console.h>
+#include <device/pci_ops.h>
#include "ht_wrapper.h"
/*----------------------------------------------------------------------------
diff --git a/src/northbridge/amd/amdk8/reset_test.c b/src/northbridge/amd/amdk8/reset_test.c
index e58046d39c..a1df9b0fe1 100644
--- a/src/northbridge/amd/amdk8/reset_test.c
+++ b/src/northbridge/amd/amdk8/reset_test.c
@@ -12,6 +12,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <stdint.h>
#include <cpu/x86/lapic.h>
#include "amdk8.h"
diff --git a/src/northbridge/amd/amdmct/mct/mct_d.c b/src/northbridge/amd/amdmct/mct/mct_d.c
index d03ae9ca98..d956315226 100644
--- a/src/northbridge/amd/amdmct/mct/mct_d.c
+++ b/src/northbridge/amd/amdmct/mct/mct_d.c
@@ -35,6 +35,7 @@
#include <string.h>
#include <cpu/amd/msr.h>
+#include <device/pci_ops.h>
#include "mct_d.h"
static u8 ReconfigureDIMMspare_D(struct MCTStatStruc *pMCTstat,
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
index 34d1c1f73a..6f09b12a8a 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
@@ -40,6 +40,7 @@
#include <cpu/x86/msr.h>
#include <cpu/amd/msr.h>
#include <cpu/x86/mtrr.h>
+#include <device/pci_ops.h>
#include <arch/acpi.h>
#include <string.h>
#include <device/dram/ddr3.h>
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c
index 570838b6bc..6d41560079 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c
@@ -17,6 +17,7 @@
#include <arch/cpu.h>
#include <inttypes.h>
#include <console/console.h>
+#include <device/pci_ops.h>
#include <string.h>
#include "mct_d.h"
#include "mct_d_gcc.h"
diff --git a/src/northbridge/amd/pi/00630F01/northbridge.c b/src/northbridge/amd/pi/00630F01/northbridge.c
index d606dc5547..ebca9c6bc7 100644
--- a/src/northbridge/amd/pi/00630F01/northbridge.c
+++ b/src/northbridge/amd/pi/00630F01/northbridge.c
@@ -15,6 +15,7 @@
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/acpi.h>
#include <stdint.h>
#include <device/device.h>
diff --git a/src/northbridge/amd/pi/00660F01/northbridge.c b/src/northbridge/amd/pi/00660F01/northbridge.c
index 00558a5095..ef8297e728 100644
--- a/src/northbridge/amd/pi/00660F01/northbridge.c
+++ b/src/northbridge/amd/pi/00660F01/northbridge.c
@@ -15,6 +15,7 @@
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/acpi.h>
#include <stdint.h>
#include <device/device.h>
diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c
index 81517afa90..0c97e4bfa8 100644
--- a/src/northbridge/amd/pi/00730F01/northbridge.c
+++ b/src/northbridge/amd/pi/00730F01/northbridge.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/acpi.h>
#include <stdint.h>
#include <device/device.h>
diff --git a/src/northbridge/amd/pi/ramtop.c b/src/northbridge/amd/pi/ramtop.c
index 8fa81c715a..987d875df3 100644
--- a/src/northbridge/amd/pi/ramtop.c
+++ b/src/northbridge/amd/pi/ramtop.c
@@ -15,6 +15,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#define CBMEM_TOP_SCRATCHPAD 0x78
diff --git a/src/northbridge/intel/e7505/debug.c b/src/northbridge/intel/e7505/debug.c
index c21e321de4..357a9633b6 100644
--- a/src/northbridge/intel/e7505/debug.c
+++ b/src/northbridge/intel/e7505/debug.c
@@ -15,6 +15,7 @@
#include <console/console.h>
#include <stdlib.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <spd.h>
#include "raminit.h"
diff --git a/src/northbridge/intel/e7505/memmap.c b/src/northbridge/intel/e7505/memmap.c
index 1b86012907..afe11bbe01 100644
--- a/src/northbridge/intel/e7505/memmap.c
+++ b/src/northbridge/intel/e7505/memmap.c
@@ -15,6 +15,7 @@
#define __SIMPLE_DEVICE__
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/cpu.h>
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/e7505/northbridge.c b/src/northbridge/intel/e7505/northbridge.c
index 317f0874f8..0032356697 100644
--- a/src/northbridge/intel/e7505/northbridge.c
+++ b/src/northbridge/intel/e7505/northbridge.c
@@ -13,6 +13,7 @@
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <stdint.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c
index 70a0d66950..276307dfa5 100644
--- a/src/northbridge/intel/e7505/raminit.c
+++ b/src/northbridge/intel/e7505/raminit.c
@@ -27,6 +27,7 @@
#include <stdint.h>
#include <device/pci_def.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <lib.h>
#include <stdlib.h>
#include <commonlib/helpers.h>
diff --git a/src/northbridge/intel/fsp_rangeley/northbridge.c b/src/northbridge/intel/fsp_rangeley/northbridge.c
index 25560dd0e3..ca439a0d9a 100644
--- a/src/northbridge/intel/fsp_rangeley/northbridge.c
+++ b/src/northbridge/intel/fsp_rangeley/northbridge.c
@@ -18,6 +18,7 @@
#include <console/console.h>
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <stdint.h>
#include <delay.h>
#include <cpu/intel/fsp_model_406dx/model_406dx.h>
diff --git a/src/northbridge/intel/fsp_rangeley/port_access.c b/src/northbridge/intel/fsp_rangeley/port_access.c
index 91e017993c..c93d3bd029 100644
--- a/src/northbridge/intel/fsp_rangeley/port_access.c
+++ b/src/northbridge/intel/fsp_rangeley/port_access.c
@@ -18,6 +18,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
#include "northbridge.h"
diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c
index dc5937230f..301743ce4a 100644
--- a/src/northbridge/intel/gm45/acpi.c
+++ b/src/northbridge/intel/gm45/acpi.c
@@ -21,6 +21,7 @@
#include <arch/acpigen.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include "gm45.h"
unsigned long acpi_fill_mcfg(unsigned long current)
diff --git a/src/northbridge/intel/gm45/bootblock.c b/src/northbridge/intel/gm45/bootblock.c
index 8a61e1c9be..5b1c301cfd 100644
--- a/src/northbridge/intel/gm45/bootblock.c
+++ b/src/northbridge/intel/gm45/bootblock.c
@@ -12,6 +12,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
/* Just re-define these instead of including gm45.h. It blows up romcc. */
#define D0F0_PCIEXBAR_LO 0x60
diff --git a/src/northbridge/intel/gm45/early_init.c b/src/northbridge/intel/gm45/early_init.c
index c2e4aea2ac..723a43f6bf 100644
--- a/src/northbridge/intel/gm45/early_init.c
+++ b/src/northbridge/intel/gm45/early_init.c
@@ -15,6 +15,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include "gm45.h"
void gm45_early_init(void)
diff --git a/src/northbridge/intel/gm45/early_reset.c b/src/northbridge/intel/gm45/early_reset.c
index c987cb3e2c..9f919cfbcd 100644
--- a/src/northbridge/intel/gm45/early_reset.c
+++ b/src/northbridge/intel/gm45/early_reset.c
@@ -16,6 +16,7 @@
#include <types.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <halt.h>
#include "gm45.h"
diff --git a/src/northbridge/intel/gm45/igd.c b/src/northbridge/intel/gm45/igd.c
index 45144aae2e..b0e2ba9916 100644
--- a/src/northbridge/intel/gm45/igd.c
+++ b/src/northbridge/intel/gm45/igd.c
@@ -17,6 +17,7 @@
#include <stdint.h>
#include <stddef.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <console/console.h>
#include <pc80/mc146818rtc.h>
diff --git a/src/northbridge/intel/gm45/iommu.c b/src/northbridge/intel/gm45/iommu.c
index f42456413b..642c8776ef 100644
--- a/src/northbridge/intel/gm45/iommu.c
+++ b/src/northbridge/intel/gm45/iommu.c
@@ -18,6 +18,7 @@
#include <string.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <arch/acpi.h>
diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c
index 791559b518..fddb1fe339 100644
--- a/src/northbridge/intel/gm45/northbridge.c
+++ b/src/northbridge/intel/gm45/northbridge.c
@@ -16,6 +16,7 @@
#include <cbmem.h>
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <stdint.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/northbridge/intel/gm45/pcie.c b/src/northbridge/intel/gm45/pcie.c
index 5d6c182550..1a6e3de1da 100644
--- a/src/northbridge/intel/gm45/pcie.c
+++ b/src/northbridge/intel/gm45/pcie.c
@@ -18,6 +18,7 @@
#include <stddef.h>
#include <string.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/gm45/ram_calc.c b/src/northbridge/intel/gm45/ram_calc.c
index af1a46dd67..c1ef30e684 100644
--- a/src/northbridge/intel/gm45/ram_calc.c
+++ b/src/northbridge/intel/gm45/ram_calc.c
@@ -20,6 +20,7 @@
#include <stdint.h>
#include <arch/cpu.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <console/console.h>
#include <cpu/intel/romstage.h>
diff --git a/src/northbridge/intel/gm45/raminit.c b/src/northbridge/intel/gm45/raminit.c
index 176c16a5d7..d4209dc51f 100644
--- a/src/northbridge/intel/gm45/raminit.c
+++ b/src/northbridge/intel/gm45/raminit.c
@@ -18,6 +18,7 @@
#include <stdlib.h>
#include <arch/cpu.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <device/device.h>
#include <spd.h>
diff --git a/src/northbridge/intel/gm45/romstage.c b/src/northbridge/intel/gm45/romstage.c
index 6d652bb8d8..7335ac914f 100644
--- a/src/northbridge/intel/gm45/romstage.c
+++ b/src/northbridge/intel/gm45/romstage.c
@@ -19,6 +19,7 @@
#include <romstage_handoff.h>
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/acpi.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/bist.h>
diff --git a/src/northbridge/intel/haswell/acpi.c b/src/northbridge/intel/haswell/acpi.c
index f655c3b6fb..d92e858d53 100644
--- a/src/northbridge/intel/haswell/acpi.c
+++ b/src/northbridge/intel/haswell/acpi.c
@@ -20,6 +20,7 @@
#include <arch/acpi.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include "haswell.h"
#include <southbridge/intel/lynxpoint/pch.h>
diff --git a/src/northbridge/intel/haswell/bootblock.c b/src/northbridge/intel/haswell/bootblock.c
index a25f363177..d7f4e6e9e9 100644
--- a/src/northbridge/intel/haswell/bootblock.c
+++ b/src/northbridge/intel/haswell/bootblock.c
@@ -12,6 +12,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
/* Just re-define this instead of including haswell.h. It blows up romcc. */
#define PCIEXBAR 0x60
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
index be83894f33..a04b3f4720 100644
--- a/src/northbridge/intel/haswell/gma.c
+++ b/src/northbridge/intel/haswell/gma.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include <console/console.h>
#include <bootmode.h>
diff --git a/src/northbridge/intel/haswell/ram_calc.c b/src/northbridge/intel/haswell/ram_calc.c
index d3e88f2f84..24fbb64b97 100644
--- a/src/northbridge/intel/haswell/ram_calc.c
+++ b/src/northbridge/intel/haswell/ram_calc.c
@@ -17,6 +17,7 @@
#define __SIMPLE_DEVICE__
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include "haswell.h"
diff --git a/src/northbridge/intel/haswell/report_platform.c b/src/northbridge/intel/haswell/report_platform.c
index 1bc31108f5..376e63f7d5 100644
--- a/src/northbridge/intel/haswell/report_platform.c
+++ b/src/northbridge/intel/haswell/report_platform.c
@@ -18,6 +18,7 @@
#include <string.h>
#include <southbridge/intel/lynxpoint/pch.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cpu/x86/msr.h>
#include "haswell.h"
diff --git a/src/northbridge/intel/i440bx/debug.c b/src/northbridge/intel/i440bx/debug.c
index cff3ade0f5..b4d92b0d51 100644
--- a/src/northbridge/intel/i440bx/debug.c
+++ b/src/northbridge/intel/i440bx/debug.c
@@ -13,6 +13,7 @@
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <spd.h>
#include "raminit.h"
diff --git a/src/northbridge/intel/i440bx/northbridge.c b/src/northbridge/intel/i440bx/northbridge.c
index 4b1141c7ff..ae897662c0 100644
--- a/src/northbridge/intel/i440bx/northbridge.c
+++ b/src/northbridge/intel/i440bx/northbridge.c
@@ -13,6 +13,7 @@
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <stdint.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/northbridge/intel/i440bx/ram_calc.c b/src/northbridge/intel/i440bx/ram_calc.c
index 962f3ba6f6..3207688b4d 100644
--- a/src/northbridge/intel/i440bx/ram_calc.c
+++ b/src/northbridge/intel/i440bx/ram_calc.c
@@ -16,6 +16,7 @@
#define __SIMPLE_DEVICE__
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include <console/console.h>
#include <commonlib/helpers.h>
diff --git a/src/northbridge/intel/i440bx/raminit.c b/src/northbridge/intel/i440bx/raminit.c
index 49994edf17..0c9496b2d5 100644
--- a/src/northbridge/intel/i440bx/raminit.c
+++ b/src/northbridge/intel/i440bx/raminit.c
@@ -20,6 +20,7 @@
#include <stdint.h>
#include <stdlib.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <console/console.h>
#include "i440bx.h"
diff --git a/src/northbridge/intel/i945/acpi.c b/src/northbridge/intel/i945/acpi.c
index 053815bbfd..f817cdf570 100644
--- a/src/northbridge/intel/i945/acpi.c
+++ b/src/northbridge/intel/i945/acpi.c
@@ -20,6 +20,7 @@
#include <arch/acpigen.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include "i945.h"
unsigned long acpi_fill_mcfg(unsigned long current)
diff --git a/src/northbridge/intel/i945/bootblock.c b/src/northbridge/intel/i945/bootblock.c
index 5296d52e40..1c00e8bebf 100644
--- a/src/northbridge/intel/i945/bootblock.c
+++ b/src/northbridge/intel/i945/bootblock.c
@@ -12,6 +12,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
/* Just re-define this instead of including i945.h. It blows up romcc. */
#define PCIEXBAR 0x48
diff --git a/src/northbridge/intel/i945/debug.c b/src/northbridge/intel/i945/debug.c
index c52f2a67e8..370131fb51 100644
--- a/src/northbridge/intel/i945/debug.c
+++ b/src/northbridge/intel/i945/debug.c
@@ -16,6 +16,7 @@
#include <spd.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <console/console.h>
#include "i945.h"
diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c
index b82812e6d1..d9d88bb445 100644
--- a/src/northbridge/intel/i945/early_init.c
+++ b/src/northbridge/intel/i945/early_init.c
@@ -18,6 +18,7 @@
#include <console/console.h>
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cbmem.h>
#include <halt.h>
diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c
index 7a2a489c6b..3a01940e64 100644
--- a/src/northbridge/intel/i945/gma.c
+++ b/src/northbridge/intel/i945/gma.c
@@ -18,6 +18,7 @@
#include <delay.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <pc80/mc146818rtc.h>
#include <edid.h>
diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c
index 7c209dc32f..1dff3d14dd 100644
--- a/src/northbridge/intel/i945/northbridge.c
+++ b/src/northbridge/intel/i945/northbridge.c
@@ -16,6 +16,7 @@
#include <cbmem.h>
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <stdint.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/northbridge/intel/i945/ram_calc.c b/src/northbridge/intel/i945/ram_calc.c
index fd37aea08c..c797d42f09 100644
--- a/src/northbridge/intel/i945/ram_calc.c
+++ b/src/northbridge/intel/i945/ram_calc.c
@@ -17,6 +17,7 @@
#define __SIMPLE_DEVICE__
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/cpu.h>
#include <cbmem.h>
#include "i945.h"
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index dece9bffae..c6a2e05b3b 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <device/pci_def.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <lib.h>
#include <pc80/mc146818rtc.h>
diff --git a/src/northbridge/intel/nehalem/acpi.c b/src/northbridge/intel/nehalem/acpi.c
index 08fc09c534..462cdc07fa 100644
--- a/src/northbridge/intel/nehalem/acpi.c
+++ b/src/northbridge/intel/nehalem/acpi.c
@@ -21,6 +21,7 @@
#include <types.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include "nehalem.h"
unsigned long acpi_fill_mcfg(unsigned long current)
diff --git a/src/northbridge/intel/nehalem/bootblock.c b/src/northbridge/intel/nehalem/bootblock.c
index 807e91936f..c37aa3a61d 100644
--- a/src/northbridge/intel/nehalem/bootblock.c
+++ b/src/northbridge/intel/nehalem/bootblock.c
@@ -12,6 +12,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
static void bootblock_northbridge_init(void)
{
diff --git a/src/northbridge/intel/nehalem/early_init.c b/src/northbridge/intel/nehalem/early_init.c
index ac0ed45d4c..2c958a4c86 100644
--- a/src/northbridge/intel/nehalem/early_init.c
+++ b/src/northbridge/intel/nehalem/early_init.c
@@ -19,6 +19,7 @@
#include <stdlib.h>
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <elog.h>
#include <cpu/x86/msr.h>
diff --git a/src/northbridge/intel/nehalem/northbridge.c b/src/northbridge/intel/nehalem/northbridge.c
index fbe6c11546..43ec6ed6bd 100644
--- a/src/northbridge/intel/nehalem/northbridge.c
+++ b/src/northbridge/intel/nehalem/northbridge.c
@@ -18,6 +18,7 @@
#include <console/console.h>
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <stdint.h>
#include <delay.h>
#include <cpu/intel/model_2065x/model_2065x.h>
diff --git a/src/northbridge/intel/nehalem/ram_calc.c b/src/northbridge/intel/nehalem/ram_calc.c
index baf087e412..3df6f8153f 100644
--- a/src/northbridge/intel/nehalem/ram_calc.c
+++ b/src/northbridge/intel/nehalem/ram_calc.c
@@ -18,6 +18,7 @@
#include <arch/cpu.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include <console/console.h>
#include <cpu/intel/romstage.h>
diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c
index c730b5ef5f..9812e532e4 100644
--- a/src/northbridge/intel/nehalem/raminit.c
+++ b/src/northbridge/intel/nehalem/raminit.c
@@ -18,6 +18,7 @@
#include <console/console.h>
#include <string.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cpu/x86/msr.h>
#include <cbmem.h>
#include <arch/cbfs.h>
diff --git a/src/northbridge/intel/nehalem/smi.c b/src/northbridge/intel/nehalem/smi.c
index a08ac1b02e..6aefc9b141 100644
--- a/src/northbridge/intel/nehalem/smi.c
+++ b/src/northbridge/intel/nehalem/smi.c
@@ -17,6 +17,7 @@
#include <string.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include "nehalem.h"
#include <cpu/intel/smm/gen1/smi.h>
diff --git a/src/northbridge/intel/pineview/bootblock.c b/src/northbridge/intel/pineview/bootblock.c
index 1fab845db2..f3eab492f5 100644
--- a/src/northbridge/intel/pineview/bootblock.c
+++ b/src/northbridge/intel/pineview/bootblock.c
@@ -12,6 +12,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#define PCIEXBAR 0x60
#define MMCONF_256_BUSSES 16
#define ENABLE 1
diff --git a/src/northbridge/intel/pineview/early_init.c b/src/northbridge/intel/pineview/early_init.c
index 89744289a2..11dc203d1e 100644
--- a/src/northbridge/intel/pineview/early_init.c
+++ b/src/northbridge/intel/pineview/early_init.c
@@ -18,6 +18,7 @@
#include <stdlib.h>
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <device/pci.h>
#include <halt.h>
diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c
index ec2c902b90..94aed89fc2 100644
--- a/src/northbridge/intel/pineview/northbridge.c
+++ b/src/northbridge/intel/pineview/northbridge.c
@@ -17,6 +17,7 @@
#include <cbmem.h>
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <stdint.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/northbridge/intel/pineview/ram_calc.c b/src/northbridge/intel/pineview/ram_calc.c
index 21b926bc9a..cf9db988e1 100644
--- a/src/northbridge/intel/pineview/ram_calc.c
+++ b/src/northbridge/intel/pineview/ram_calc.c
@@ -17,6 +17,7 @@
#define __SIMPLE_DEVICE__
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci_def.h>
#include <console/console.h>
diff --git a/src/northbridge/intel/pineview/raminit.c b/src/northbridge/intel/pineview/raminit.c
index ed633fd745..1b2ad8de6f 100644
--- a/src/northbridge/intel/pineview/raminit.c
+++ b/src/northbridge/intel/pineview/raminit.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <delay.h>
diff --git a/src/northbridge/intel/pineview/romstage.c b/src/northbridge/intel/pineview/romstage.c
index 10ac0f53b4..0d2cc368da 100644
--- a/src/northbridge/intel/pineview/romstage.c
+++ b/src/northbridge/intel/pineview/romstage.c
@@ -20,6 +20,7 @@
#include <lib.h>
#include <timestamp.h>
#include <console/console.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include <romstage_handoff.h>
#include <southbridge/intel/i82801gx/i82801gx.h>
diff --git a/src/northbridge/intel/sandybridge/acpi.c b/src/northbridge/intel/sandybridge/acpi.c
index c2743189fb..4afb54646d 100644
--- a/src/northbridge/intel/sandybridge/acpi.c
+++ b/src/northbridge/intel/sandybridge/acpi.c
@@ -21,6 +21,7 @@
#include <arch/acpi.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include "sandybridge.h"
#include <southbridge/intel/bd82x6x/pch.h>
diff --git a/src/northbridge/intel/sandybridge/bootblock.c b/src/northbridge/intel/sandybridge/bootblock.c
index 05b0c7558c..c35a49a51b 100644
--- a/src/northbridge/intel/sandybridge/bootblock.c
+++ b/src/northbridge/intel/sandybridge/bootblock.c
@@ -12,6 +12,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
/* Just re-define this instead of including sandybridge.h. It blows up romcc. */
#define PCIEXBAR 0x60
diff --git a/src/northbridge/intel/sandybridge/early_init.c b/src/northbridge/intel/sandybridge/early_init.c
index f8ecc1a77a..01787f13a9 100644
--- a/src/northbridge/intel/sandybridge/early_init.c
+++ b/src/northbridge/intel/sandybridge/early_init.c
@@ -18,6 +18,7 @@
#include <stdlib.h>
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/acpi.h>
#include <device/pci_def.h>
#include <elog.h>
diff --git a/src/northbridge/intel/sandybridge/iommu.c b/src/northbridge/intel/sandybridge/iommu.c
index 017c73233c..26bbdf995b 100644
--- a/src/northbridge/intel/sandybridge/iommu.c
+++ b/src/northbridge/intel/sandybridge/iommu.c
@@ -17,6 +17,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci_def.h>
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 0d644ca14a..4d00d738cd 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <stdint.h>
#include <delay.h>
#include <cpu/intel/model_206ax/model_206ax.h>
diff --git a/src/northbridge/intel/sandybridge/pcie.c b/src/northbridge/intel/sandybridge/pcie.c
index bb88c7a02e..53fb4d3530 100644
--- a/src/northbridge/intel/sandybridge/pcie.c
+++ b/src/northbridge/intel/sandybridge/pcie.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pciexp.h>
#include <device/pci_ids.h>
#include <assert.h>
diff --git a/src/northbridge/intel/sandybridge/ram_calc.c b/src/northbridge/intel/sandybridge/ram_calc.c
index 00e3e785a7..0e5127de94 100644
--- a/src/northbridge/intel/sandybridge/ram_calc.c
+++ b/src/northbridge/intel/sandybridge/ram_calc.c
@@ -17,6 +17,7 @@
#include <arch/cpu.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include <console/console.h>
#include <cpu/intel/romstage.h>
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 5f7fd0a8ca..115d515517 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -21,6 +21,7 @@
#include <string.h>
#include <arch/cpu.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include <halt.h>
#include <timestamp.h>
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index 489758135d..afdd9084c4 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -19,6 +19,7 @@
#include <string.h>
#include <arch/cpu.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <northbridge/intel/sandybridge/chip.h>
#include <device/pci_def.h>
#include <delay.h>
diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c
index af9b490554..6142388c5b 100644
--- a/src/northbridge/intel/sandybridge/raminit_mrc.c
+++ b/src/northbridge/intel/sandybridge/raminit_mrc.c
@@ -18,6 +18,7 @@
#include <bootmode.h>
#include <string.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include <arch/cbfs.h>
#include <cbfs.h>
diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c
index 26f49772f8..c979897354 100644
--- a/src/northbridge/intel/sandybridge/romstage.c
+++ b/src/northbridge/intel/sandybridge/romstage.c
@@ -19,6 +19,7 @@
#include <string.h>
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cpu/x86/lapic.h>
#include <timestamp.h>
#include "sandybridge.h"
diff --git a/src/northbridge/intel/x4x/bootblock.c b/src/northbridge/intel/x4x/bootblock.c
index 9629d887c2..b470e955e1 100644
--- a/src/northbridge/intel/x4x/bootblock.c
+++ b/src/northbridge/intel/x4x/bootblock.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include "iomap.h"
#include "x4x.h"
diff --git a/src/northbridge/intel/x4x/early_init.c b/src/northbridge/intel/x4x/early_init.c
index c6eb38315b..9cb3df3565 100644
--- a/src/northbridge/intel/x4x/early_init.c
+++ b/src/northbridge/intel/x4x/early_init.c
@@ -16,6 +16,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include "iomap.h"
#if IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801GX)
#include <southbridge/intel/i82801gx/i82801gx.h> /* DEFAULT_PMBASE */
diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c
index 4b5a754a1c..c168e38f51 100644
--- a/src/northbridge/intel/x4x/northbridge.c
+++ b/src/northbridge/intel/x4x/northbridge.c
@@ -17,6 +17,7 @@
#include <cbmem.h>
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <stdint.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/northbridge/intel/x4x/ram_calc.c b/src/northbridge/intel/x4x/ram_calc.c
index 6484326e57..ff3c31b4f5 100644
--- a/src/northbridge/intel/x4x/ram_calc.c
+++ b/src/northbridge/intel/x4x/ram_calc.c
@@ -22,6 +22,7 @@
#include <stdint.h>
#include <arch/cpu.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <console/console.h>
#include <cpu/intel/romstage.h>
diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c
index 1fd600484f..ea00f293e1 100644
--- a/src/northbridge/intel/x4x/raminit.c
+++ b/src/northbridge/intel/x4x/raminit.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c
index 5c5dafa644..ffa861eb66 100644
--- a/src/northbridge/intel/x4x/raminit_ddr23.c
+++ b/src/northbridge/intel/x4x/raminit_ddr23.c
@@ -17,6 +17,7 @@
#include <assert.h>
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <commonlib/helpers.h>
#include <delay.h>
diff --git a/src/northbridge/via/vx900/bootblock.c b/src/northbridge/via/vx900/bootblock.c
index 11123b6e11..1051be45ca 100644
--- a/src/northbridge/via/vx900/bootblock.c
+++ b/src/northbridge/via/vx900/bootblock.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#if CONFIG_ROM_SIZE == 0x80000
# define ROM_DECODE_MAP 0x00
diff --git a/src/northbridge/via/vx900/chrome9hd.c b/src/northbridge/via/vx900/chrome9hd.c
index abba4d3b34..69a0a6b6c9 100644
--- a/src/northbridge/via/vx900/chrome9hd.c
+++ b/src/northbridge/via/vx900/chrome9hd.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/northbridge/via/vx900/early_smbus.c b/src/northbridge/via/vx900/early_smbus.c
index 0cf7427e5d..5816926f59 100644
--- a/src/northbridge/via/vx900/early_smbus.c
+++ b/src/northbridge/via/vx900/early_smbus.c
@@ -19,6 +19,7 @@
#include <device/early_smbus.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
/**
diff --git a/src/northbridge/via/vx900/early_vx900.c b/src/northbridge/via/vx900/early_vx900.c
index fe858b6800..d5c702ccd1 100644
--- a/src/northbridge/via/vx900/early_vx900.c
+++ b/src/northbridge/via/vx900/early_vx900.c
@@ -16,6 +16,7 @@
#include "early_vx900.h"
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
/**
diff --git a/src/northbridge/via/vx900/lpc.c b/src/northbridge/via/vx900/lpc.c
index 40c4299d95..221fe8e189 100644
--- a/src/northbridge/via/vx900/lpc.c
+++ b/src/northbridge/via/vx900/lpc.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/pirq_routing.h>
#include <console/console.h>
#include <device/pci.h>
diff --git a/src/northbridge/via/vx900/memmap.c b/src/northbridge/via/vx900/memmap.c
index 9940502d27..18d9635379 100644
--- a/src/northbridge/via/vx900/memmap.c
+++ b/src/northbridge/via/vx900/memmap.c
@@ -20,6 +20,7 @@
#include "vx900.h"
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#define MCU PCI_DEV(0, 0, 3)
diff --git a/src/northbridge/via/vx900/northbridge.c b/src/northbridge/via/vx900/northbridge.c
index 41a1073d89..0544c17a66 100644
--- a/src/northbridge/via/vx900/northbridge.c
+++ b/src/northbridge/via/vx900/northbridge.c
@@ -20,6 +20,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cf9_reset.h>
diff --git a/src/northbridge/via/vx900/pcie.c b/src/northbridge/via/vx900/pcie.c
index 1d3ecd9938..b4d2723c75 100644
--- a/src/northbridge/via/vx900/pcie.c
+++ b/src/northbridge/via/vx900/pcie.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/pci.h>
#include <device/pciexp.h>
diff --git a/src/northbridge/via/vx900/raminit_ddr3.c b/src/northbridge/via/vx900/raminit_ddr3.c
index 59d206c28c..e03470c704 100644
--- a/src/northbridge/via/vx900/raminit_ddr3.c
+++ b/src/northbridge/via/vx900/raminit_ddr3.c
@@ -17,6 +17,7 @@
#include "early_vx900.h"
#include "raminit.h"
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <delay.h>
diff --git a/src/northbridge/via/vx900/sata.c b/src/northbridge/via/vx900/sata.c
index d6f4c836c0..791133142f 100644
--- a/src/northbridge/via/vx900/sata.c
+++ b/src/northbridge/via/vx900/sata.c
@@ -16,6 +16,7 @@
#include <console/console.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include "vx900.h"
diff --git a/src/northbridge/via/vx900/traf_ctrl.c b/src/northbridge/via/vx900/traf_ctrl.c
index 734defcf25..8f3f6023ad 100644
--- a/src/northbridge/via/vx900/traf_ctrl.c
+++ b/src/northbridge/via/vx900/traf_ctrl.c
@@ -15,6 +15,7 @@
*/
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <console/console.h>
#include <drivers/generic/ioapic/chip.h>
diff --git a/src/northbridge/via/vx900/vx900.h b/src/northbridge/via/vx900/vx900.h
index 29fc472b3d..210a250eb2 100644
--- a/src/northbridge/via/vx900/vx900.h
+++ b/src/northbridge/via/vx900/vx900.h
@@ -27,8 +27,8 @@
#define VX900_MAX_MEM_RANKS 4
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci.h>
-
#include <console/console.h>
u32 vx900_get_tolm(void);
diff --git a/src/soc/amd/common/block/pci/amd_pci_util.c b/src/soc/amd/common/block/pci/amd_pci_util.c
index 44a2e61543..d06a8df9fa 100644
--- a/src/soc/amd/common/block/pci/amd_pci_util.c
+++ b/src/soc/amd/common/block/pci/amd_pci_util.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <string.h>
#include <amdblocks/amd_pci_util.h>
#include <pc80/i8259.h>
diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c
index ccfd0fd295..984945f3a9 100644
--- a/src/soc/amd/stoneyridge/acpi.c
+++ b/src/soc/amd/stoneyridge/acpi.c
@@ -23,6 +23,7 @@
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/ioapic.h>
#include <cpu/x86/smm.h>
#include <cbmem.h>
diff --git a/src/soc/amd/stoneyridge/enable_usbdebug.c b/src/soc/amd/stoneyridge/enable_usbdebug.c
index 27ac61f980..ce84a47929 100644
--- a/src/soc/amd/stoneyridge/enable_usbdebug.c
+++ b/src/soc/amd/stoneyridge/enable_usbdebug.c
@@ -18,6 +18,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_ehci.h>
#include <device/pci_def.h>
#include <soc/pci_devs.h>
diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c
index 4a856a9fa2..9ccc2e9ef9 100644
--- a/src/soc/amd/stoneyridge/northbridge.c
+++ b/src/soc/amd/stoneyridge/northbridge.c
@@ -15,6 +15,7 @@
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
#include <arch/acpigen.h>
diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c
index 9f8aed8d59..1489a57673 100644
--- a/src/soc/amd/stoneyridge/romstage.c
+++ b/src/soc/amd/stoneyridge/romstage.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/cpu.h>
#include <arch/acpi.h>
#include <cpu/x86/msr.h>
diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c
index cf3e8395de..bb5eff8c8b 100644
--- a/src/soc/intel/apollolake/bootblock/bootblock.c
+++ b/src/soc/intel/apollolake/bootblock/bootblock.c
@@ -18,6 +18,7 @@
#include <bootblock_common.h>
#include <cpu/x86/pae.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <intelblocks/cpulib.h>
#include <intelblocks/fast_spi.h>
#include <intelblocks/p2sb.h>
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 363450911a..3eed45c167 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -25,6 +25,7 @@
#include <cpu/x86/msr.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <intelblocks/acpi.h>
#include <intelblocks/chip.h>
#include <intelblocks/fast_spi.h>
diff --git a/src/soc/intel/apollolake/graphics.c b/src/soc/intel/apollolake/graphics.c
index 37cdda4c47..9be598f61a 100644
--- a/src/soc/intel/apollolake/graphics.c
+++ b/src/soc/intel/apollolake/graphics.c
@@ -23,6 +23,7 @@
#include <fsp/util.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <intelblocks/graphics.h>
#include <drivers/intel/gma/opregion.h>
#include <drivers/intel/gma/libgfxinit.h>
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index 9cc516665a..a8a943d6e8 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -19,6 +19,7 @@
#include <arch/cpu.h>
#include <arch/early_variables.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/symbols.h>
#include <assert.h>
#include <bootmode.h>
diff --git a/src/soc/intel/baytrail/bootblock/bootblock.c b/src/soc/intel/baytrail/bootblock/bootblock.c
index ac61375730..d51f281e01 100644
--- a/src/soc/intel/baytrail/bootblock/bootblock.c
+++ b/src/soc/intel/baytrail/bootblock/bootblock.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
diff --git a/src/soc/intel/baytrail/chip.c b/src/soc/intel/baytrail/chip.c
index 2c026893b5..210263734a 100644
--- a/src/soc/intel/baytrail/chip.c
+++ b/src/soc/intel/baytrail/chip.c
@@ -15,6 +15,7 @@
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <arch/pci_ops.h>
#include <soc/pci_devs.h>
diff --git a/src/soc/intel/baytrail/gfx.c b/src/soc/intel/baytrail/gfx.c
index f8e78d23a8..5a36de57f3 100644
--- a/src/soc/intel/baytrail/gfx.c
+++ b/src/soc/intel/baytrail/gfx.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
diff --git a/src/soc/intel/baytrail/iosf.c b/src/soc/intel/baytrail/iosf.c
index 3c28ba5dd3..5496b011a3 100644
--- a/src/soc/intel/baytrail/iosf.c
+++ b/src/soc/intel/baytrail/iosf.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <soc/iosf.h>
#if !defined(__PRE_RAM__)
diff --git a/src/soc/intel/baytrail/lpe.c b/src/soc/intel/baytrail/lpe.c
index 2830f00338..caa37103bb 100644
--- a/src/soc/intel/baytrail/lpe.c
+++ b/src/soc/intel/baytrail/lpe.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/soc/intel/baytrail/pcie.c b/src/soc/intel/baytrail/pcie.c
index 3e03ca5d98..2740f1084e 100644
--- a/src/soc/intel/baytrail/pcie.c
+++ b/src/soc/intel/baytrail/pcie.c
@@ -16,6 +16,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pciexp.h>
#include <device/pci_ids.h>
#include <reg_script.h>
diff --git a/src/soc/intel/baytrail/pmutil.c b/src/soc/intel/baytrail/pmutil.c
index be870fc8b9..5ef1f714bd 100644
--- a/src/soc/intel/baytrail/pmutil.c
+++ b/src/soc/intel/baytrail/pmutil.c
@@ -16,6 +16,7 @@
#include <stdint.h>
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/soc/intel/baytrail/romstage/gfx.c b/src/soc/intel/baytrail/romstage/gfx.c
index e1434ef30c..884bf87d22 100644
--- a/src/soc/intel/baytrail/romstage/gfx.c
+++ b/src/soc/intel/baytrail/romstage/gfx.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <soc/gfx.h>
#include <soc/pci_devs.h>
#include <soc/romstage.h>
diff --git a/src/soc/intel/baytrail/romstage/pmc.c b/src/soc/intel/baytrail/romstage/pmc.c
index e77d00d36c..596ed11fa4 100644
--- a/src/soc/intel/baytrail/romstage/pmc.c
+++ b/src/soc/intel/baytrail/romstage/pmc.c
@@ -15,6 +15,7 @@
#include <stddef.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci_def.h>
diff --git a/src/soc/intel/baytrail/romstage/raminit.c b/src/soc/intel/baytrail/romstage/raminit.c
index cc055c0dbe..550f8724c3 100644
--- a/src/soc/intel/baytrail/romstage/raminit.c
+++ b/src/soc/intel/baytrail/romstage/raminit.c
@@ -21,6 +21,7 @@
#include <cf9_reset.h>
#include <console/console.h>
#include <device/pci_def.h>
+#include <device/pci_ops.h>
#include <halt.h>
#include <mrc_cache.h>
#include <soc/gpio.h>
diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c
index a4a05dc840..3e0ba32a45 100644
--- a/src/soc/intel/baytrail/romstage/romstage.c
+++ b/src/soc/intel/baytrail/romstage/romstage.c
@@ -16,6 +16,7 @@
#include <stddef.h>
#include <arch/cpu.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <bootblock_common.h>
#include <console/console.h>
#include <cbmem.h>
diff --git a/src/soc/intel/baytrail/romstage/uart.c b/src/soc/intel/baytrail/romstage/uart.c
index f3c50294dd..41c879db91 100644
--- a/src/soc/intel/baytrail/romstage/uart.c
+++ b/src/soc/intel/baytrail/romstage/uart.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <soc/gpio.h>
#include <soc/iomap.h>
#include <soc/lpc.h>
diff --git a/src/soc/intel/baytrail/sata.c b/src/soc/intel/baytrail/sata.c
index 4724d55f51..adf0f96f84 100644
--- a/src/soc/intel/baytrail/sata.c
+++ b/src/soc/intel/baytrail/sata.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
#include <soc/sata.h>
diff --git a/src/soc/intel/baytrail/sd.c b/src/soc/intel/baytrail/sd.c
index 0c03e5690f..872f6f98eb 100644
--- a/src/soc/intel/baytrail/sd.c
+++ b/src/soc/intel/baytrail/sd.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/baytrail/smihandler.c b/src/soc/intel/baytrail/smihandler.c
index 3f8727def8..c722f5c1f2 100644
--- a/src/soc/intel/baytrail/smihandler.c
+++ b/src/soc/intel/baytrail/smihandler.c
@@ -16,6 +16,7 @@
#include <stdint.h>
#include <stdlib.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c
index d5e3400e6f..89b6b31ebf 100644
--- a/src/soc/intel/baytrail/southcluster.c
+++ b/src/soc/intel/baytrail/southcluster.c
@@ -17,6 +17,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/acpi.h>
#include <arch/cpu.h>
#include <bootstate.h>
diff --git a/src/soc/intel/baytrail/spi.c b/src/soc/intel/baytrail/spi.c
index f7472b962d..7cbb082116 100644
--- a/src/soc/intel/baytrail/spi.c
+++ b/src/soc/intel/baytrail/spi.c
@@ -19,6 +19,7 @@
#include <bootstate.h>
#include <delay.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <commonlib/helpers.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/soc/intel/baytrail/xhci.c b/src/soc/intel/baytrail/xhci.c
index 6ad63ba9a3..6408cd9a9c 100644
--- a/src/soc/intel/baytrail/xhci.c
+++ b/src/soc/intel/baytrail/xhci.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <stdint.h>
#include <reg_script.h>
diff --git a/src/soc/intel/braswell/bootblock/bootblock.c b/src/soc/intel/braswell/bootblock/bootblock.c
index 79d44e05c9..c544ff9b44 100644
--- a/src/soc/intel/braswell/bootblock/bootblock.c
+++ b/src/soc/intel/braswell/bootblock/bootblock.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
diff --git a/src/soc/intel/braswell/chip.c b/src/soc/intel/braswell/chip.c
index b7f6d4dd1a..e8fd9d17b7 100644
--- a/src/soc/intel/braswell/chip.c
+++ b/src/soc/intel/braswell/chip.c
@@ -18,6 +18,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <fsp/util.h>
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
diff --git a/src/soc/intel/braswell/iosf.c b/src/soc/intel/braswell/iosf.c
index 990c2b5337..aff1c3dd11 100644
--- a/src/soc/intel/braswell/iosf.c
+++ b/src/soc/intel/braswell/iosf.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <soc/iosf.h>
diff --git a/src/soc/intel/braswell/lpe.c b/src/soc/intel/braswell/lpe.c
index 6338878a1e..7b7eb9b359 100644
--- a/src/soc/intel/braswell/lpe.c
+++ b/src/soc/intel/braswell/lpe.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/soc/intel/braswell/pcie.c b/src/soc/intel/braswell/pcie.c
index efd891a7c8..84949748fc 100644
--- a/src/soc/intel/braswell/pcie.c
+++ b/src/soc/intel/braswell/pcie.c
@@ -18,6 +18,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pciexp.h>
#include <device/pci_ids.h>
#include <reg_script.h>
diff --git a/src/soc/intel/braswell/pmutil.c b/src/soc/intel/braswell/pmutil.c
index be1b49ea29..fbaac2e21e 100644
--- a/src/soc/intel/braswell/pmutil.c
+++ b/src/soc/intel/braswell/pmutil.c
@@ -16,6 +16,7 @@
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include <console/console.h>
#include <soc/iomap.h>
diff --git a/src/soc/intel/braswell/romstage/romstage.c b/src/soc/intel/braswell/romstage/romstage.c
index 9b9a0eba5d..38047ed429 100644
--- a/src/soc/intel/braswell/romstage/romstage.c
+++ b/src/soc/intel/braswell/romstage/romstage.c
@@ -19,6 +19,7 @@
#include <stddef.h>
#include <arch/early_variables.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/cbfs.h>
#include <chip.h>
#include <cpu/x86/mtrr.h>
diff --git a/src/soc/intel/braswell/sd.c b/src/soc/intel/braswell/sd.c
index 1775ce74be..c0c827d39c 100644
--- a/src/soc/intel/braswell/sd.c
+++ b/src/soc/intel/braswell/sd.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/braswell/smihandler.c b/src/soc/intel/braswell/smihandler.c
index a4d2d88310..1129e04ccd 100644
--- a/src/soc/intel/braswell/smihandler.c
+++ b/src/soc/intel/braswell/smihandler.c
@@ -16,6 +16,7 @@
#include <arch/hlt.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c
index dc918ebf4c..3cd22082b0 100644
--- a/src/soc/intel/braswell/southcluster.c
+++ b/src/soc/intel/braswell/southcluster.c
@@ -17,6 +17,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <bootstate.h>
diff --git a/src/soc/intel/braswell/spi.c b/src/soc/intel/braswell/spi.c
index 14d1087006..0937268119 100644
--- a/src/soc/intel/braswell/spi.c
+++ b/src/soc/intel/braswell/spi.c
@@ -15,6 +15,7 @@
/* This file is derived from the flashrom project. */
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <bootstate.h>
#include <commonlib/helpers.h>
#include <console/console.h>
diff --git a/src/soc/intel/broadwell/bootblock/pch.c b/src/soc/intel/broadwell/bootblock/pch.c
index 2643801c94..88c61d1aca 100644
--- a/src/soc/intel/broadwell/bootblock/pch.c
+++ b/src/soc/intel/broadwell/bootblock/pch.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <soc/iomap.h>
#include <soc/lpc.h>
#include <soc/pci_devs.h>
diff --git a/src/soc/intel/broadwell/bootblock/systemagent.c b/src/soc/intel/broadwell/bootblock/systemagent.c
index 1a09f8e49f..2f6b5b43a3 100644
--- a/src/soc/intel/broadwell/bootblock/systemagent.c
+++ b/src/soc/intel/broadwell/bootblock/systemagent.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <soc/pci_devs.h>
#include <soc/systemagent.h>
diff --git a/src/soc/intel/broadwell/chip.c b/src/soc/intel/broadwell/chip.c
index 3b17745e35..aab8045f3f 100644
--- a/src/soc/intel/broadwell/chip.c
+++ b/src/soc/intel/broadwell/chip.c
@@ -15,6 +15,7 @@
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <soc/acpi.h>
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
diff --git a/src/soc/intel/broadwell/ehci.c b/src/soc/intel/broadwell/ehci.c
index 8972f56411..7efdca0645 100644
--- a/src/soc/intel/broadwell/ehci.c
+++ b/src/soc/intel/broadwell/ehci.c
@@ -20,6 +20,7 @@
#include <device/pci_ids.h>
#include <device/pci_ehci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <soc/ehci.h>
#include <soc/pch.h>
diff --git a/src/soc/intel/broadwell/igd.c b/src/soc/intel/broadwell/igd.c
index 23c650a6e4..da6db7d7c3 100644
--- a/src/soc/intel/broadwell/igd.c
+++ b/src/soc/intel/broadwell/igd.c
@@ -15,6 +15,7 @@
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <bootmode.h>
#include <console/console.h>
#include <delay.h>
diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c
index 762198b1a8..63db9aaafc 100644
--- a/src/soc/intel/broadwell/lpc.c
+++ b/src/soc/intel/broadwell/lpc.c
@@ -24,6 +24,7 @@
#include <pc80/i8259.h>
#include <arch/cpu.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
#include <cpu/cpu.h>
diff --git a/src/soc/intel/broadwell/me.c b/src/soc/intel/broadwell/me.c
index f8b3be9f63..fc1406d71b 100644
--- a/src/soc/intel/broadwell/me.c
+++ b/src/soc/intel/broadwell/me.c
@@ -23,6 +23,7 @@
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/broadwell/me_status.c b/src/soc/intel/broadwell/me_status.c
index 374870185b..22490362ea 100644
--- a/src/soc/intel/broadwell/me_status.c
+++ b/src/soc/intel/broadwell/me_status.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/pci.h>
#include <stdlib.h>
diff --git a/src/soc/intel/broadwell/memmap.c b/src/soc/intel/broadwell/memmap.c
index 175c20ccf0..027c958a13 100644
--- a/src/soc/intel/broadwell/memmap.c
+++ b/src/soc/intel/broadwell/memmap.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include <device/pci.h>
#include <soc/pci_devs.h>
diff --git a/src/soc/intel/broadwell/pch.c b/src/soc/intel/broadwell/pch.c
index c5df1adc08..cddc9322ea 100644
--- a/src/soc/intel/broadwell/pch.c
+++ b/src/soc/intel/broadwell/pch.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <delay.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_def.h>
diff --git a/src/soc/intel/broadwell/pmutil.c b/src/soc/intel/broadwell/pmutil.c
index e19025bf7a..322e96f4a0 100644
--- a/src/soc/intel/broadwell/pmutil.c
+++ b/src/soc/intel/broadwell/pmutil.c
@@ -20,6 +20,7 @@
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_def.h>
diff --git a/src/soc/intel/broadwell/romstage/power_state.c b/src/soc/intel/broadwell/romstage/power_state.c
index 2affb260f5..291d5eb9ea 100644
--- a/src/soc/intel/broadwell/romstage/power_state.c
+++ b/src/soc/intel/broadwell/romstage/power_state.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/soc/intel/broadwell/romstage/report_platform.c b/src/soc/intel/broadwell/romstage/report_platform.c
index db4b2ebdc5..751e8d00d9 100644
--- a/src/soc/intel/broadwell/romstage/report_platform.c
+++ b/src/soc/intel/broadwell/romstage/report_platform.c
@@ -15,6 +15,7 @@
#include <arch/cpu.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/pci.h>
#include <string.h>
diff --git a/src/soc/intel/broadwell/romstage/systemagent.c b/src/soc/intel/broadwell/romstage/systemagent.c
index 153dfdfe13..9911ad10fa 100644
--- a/src/soc/intel/broadwell/romstage/systemagent.c
+++ b/src/soc/intel/broadwell/romstage/systemagent.c
@@ -16,6 +16,7 @@
#include <stdlib.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <reg_script.h>
#include <soc/iomap.h>
diff --git a/src/soc/intel/broadwell/sata.c b/src/soc/intel/broadwell/sata.c
index f66eb0a04b..0853753fe3 100644
--- a/src/soc/intel/broadwell/sata.c
+++ b/src/soc/intel/broadwell/sata.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/broadwell/serialio.c b/src/soc/intel/broadwell/serialio.c
index eb70112072..9d751e5c2f 100644
--- a/src/soc/intel/broadwell/serialio.c
+++ b/src/soc/intel/broadwell/serialio.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/soc/intel/broadwell/smihandler.c b/src/soc/intel/broadwell/smihandler.c
index 52725f25b2..6b2dfc2314 100644
--- a/src/soc/intel/broadwell/smihandler.c
+++ b/src/soc/intel/broadwell/smihandler.c
@@ -17,6 +17,7 @@
#include <delay.h>
#include <types.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <device/pci_def.h>
diff --git a/src/soc/intel/broadwell/smmrelocate.c b/src/soc/intel/broadwell/smmrelocate.c
index 49b8554f59..5dd076f14a 100644
--- a/src/soc/intel/broadwell/smmrelocate.c
+++ b/src/soc/intel/broadwell/smmrelocate.c
@@ -17,6 +17,7 @@
#include <string.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/mp.h>
diff --git a/src/soc/intel/broadwell/spi.c b/src/soc/intel/broadwell/spi.c
index 52809673aa..7770731b1f 100644
--- a/src/soc/intel/broadwell/spi.c
+++ b/src/soc/intel/broadwell/spi.c
@@ -19,6 +19,7 @@
#include <commonlib/helpers.h>
#include <delay.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/broadwell/systemagent.c b/src/soc/intel/broadwell/systemagent.c
index 2ef8691007..bfb8b06aa6 100644
--- a/src/soc/intel/broadwell/systemagent.c
+++ b/src/soc/intel/broadwell/systemagent.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <stdint.h>
#include <delay.h>
#include <device/device.h>
diff --git a/src/soc/intel/broadwell/xhci.c b/src/soc/intel/broadwell/xhci.c
index b5980df3fd..bd11807156 100644
--- a/src/soc/intel/broadwell/xhci.c
+++ b/src/soc/intel/broadwell/xhci.c
@@ -19,6 +19,7 @@
#include <device/pci_ids.h>
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <soc/ramstage.h>
#include <soc/xhci.h>
#include <soc/cpu.h>
diff --git a/src/soc/intel/cannonlake/bootblock/pch.c b/src/soc/intel/cannonlake/bootblock/pch.c
index f45e177c0a..5ca19e5217 100644
--- a/src/soc/intel/cannonlake/bootblock/pch.c
+++ b/src/soc/intel/cannonlake/bootblock/pch.c
@@ -16,6 +16,7 @@
#include <console/console.h>
#include <device/device.h>
+#include <device/pci_ops.h>
#include <intelblocks/fast_spi.h>
#include <intelblocks/gspi.h>
#include <intelblocks/lpc_lib.h>
diff --git a/src/soc/intel/cannonlake/bootblock/report_platform.c b/src/soc/intel/cannonlake/bootblock/report_platform.c
index 41cfad6dee..9a4dd4ab3f 100644
--- a/src/soc/intel/cannonlake/bootblock/report_platform.c
+++ b/src/soc/intel/cannonlake/bootblock/report_platform.c
@@ -16,6 +16,7 @@
#include <arch/cpu.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
#include <device/pci.h>
diff --git a/src/soc/intel/cannonlake/graphics.c b/src/soc/intel/cannonlake/graphics.c
index 58f87f7474..2b3c9007a4 100644
--- a/src/soc/intel/cannonlake/graphics.c
+++ b/src/soc/intel/cannonlake/graphics.c
@@ -19,6 +19,7 @@
#include <fsp/util.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <drivers/intel/gma/i915_reg.h>
#include <drivers/intel/gma/opregion.h>
#include <intelblocks/graphics.h>
diff --git a/src/soc/intel/cannonlake/lpc.c b/src/soc/intel/cannonlake/lpc.c
index c06ce97053..5dffb8197e 100644
--- a/src/soc/intel/cannonlake/lpc.c
+++ b/src/soc/intel/cannonlake/lpc.c
@@ -22,6 +22,7 @@
#include <pc80/isa-dma.h>
#include <pc80/i8259.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/ioapic.h>
#include <intelblocks/itss.h>
#include <intelblocks/lpc_lib.h>
diff --git a/src/soc/intel/cannonlake/smmrelocate.c b/src/soc/intel/cannonlake/smmrelocate.c
index e688592a4c..47efa18c6c 100644
--- a/src/soc/intel/cannonlake/smmrelocate.c
+++ b/src/soc/intel/cannonlake/smmrelocate.c
@@ -18,6 +18,7 @@
#include <string.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/lapic.h>
diff --git a/src/soc/intel/common/block/i2c/i2c.c b/src/soc/intel/common/block/i2c/i2c.c
index 70a4406095..63587968b8 100644
--- a/src/soc/intel/common/block/i2c/i2c.c
+++ b/src/soc/intel/common/block/i2c/i2c.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/i2c_simple.h>
diff --git a/src/soc/intel/common/block/lpc/lpc_lib.c b/src/soc/intel/common/block/lpc/lpc_lib.c
index fb50b7401e..494a1b0fed 100644
--- a/src/soc/intel/common/block/lpc/lpc_lib.c
+++ b/src/soc/intel/common/block/lpc/lpc_lib.c
@@ -20,6 +20,7 @@
#include <assert.h>
#include <console/console.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <intelblocks/lpc_lib.h>
#include <lib.h>
#include "lpc_def.h"
diff --git a/src/soc/intel/common/block/p2sb/p2sb.c b/src/soc/intel/common/block/p2sb/p2sb.c
index 24f3a69d0e..a0daeed19b 100644
--- a/src/soc/intel/common/block/p2sb/p2sb.c
+++ b/src/soc/intel/common/block/p2sb/p2sb.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/common/block/pmc/pmc.c b/src/soc/intel/common/block/pmc/pmc.c
index 7f6d2497b3..1f25d756f3 100644
--- a/src/soc/intel/common/block/pmc/pmc.c
+++ b/src/soc/intel/common/block/pmc/pmc.c
@@ -15,6 +15,7 @@
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <device/pci.h>
diff --git a/src/soc/intel/common/block/sata/sata.c b/src/soc/intel/common/block/sata/sata.c
index a39ef52a4f..129a35929e 100644
--- a/src/soc/intel/common/block/sata/sata.c
+++ b/src/soc/intel/common/block/sata/sata.c
@@ -15,6 +15,7 @@
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <soc/pci_devs.h>
diff --git a/src/soc/intel/common/block/smbus/tco.c b/src/soc/intel/common/block/smbus/tco.c
index 14589450d2..f1a2ca0874 100644
--- a/src/soc/intel/common/block/smbus/tco.c
+++ b/src/soc/intel/common/block/smbus/tco.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_def.h>
diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c
index 16f31b6756..0c10d6be49 100644
--- a/src/soc/intel/common/block/smm/smihandler.c
+++ b/src/soc/intel/common/block/smm/smihandler.c
@@ -16,6 +16,7 @@
#include <arch/hlt.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c
index 4b4e74c1ac..55f19aec70 100644
--- a/src/soc/intel/common/block/systemagent/systemagent.c
+++ b/src/soc/intel/common/block/systemagent/systemagent.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/common/block/systemagent/systemagent_early.c b/src/soc/intel/common/block/systemagent/systemagent_early.c
index c1cef5daf1..17df42dea9 100644
--- a/src/soc/intel/common/block/systemagent/systemagent_early.c
+++ b/src/soc/intel/common/block/systemagent/systemagent_early.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <delay.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c
index fd89c798c4..7633637950 100644
--- a/src/soc/intel/denverton_ns/acpi.c
+++ b/src/soc/intel/denverton_ns/acpi.c
@@ -24,6 +24,7 @@
#include <cpu/x86/smm.h>
#include <string.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include <intelblocks/acpi.h>
diff --git a/src/soc/intel/denverton_ns/bootblock/uart.c b/src/soc/intel/denverton_ns/bootblock/uart.c
index 8af6b3928b..c0aa25fca9 100644
--- a/src/soc/intel/denverton_ns/bootblock/uart.c
+++ b/src/soc/intel/denverton_ns/bootblock/uart.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <fsp/soc_binding.h>
#include <commonlib/helpers.h>
diff --git a/src/soc/intel/denverton_ns/chip.c b/src/soc/intel/denverton_ns/chip.c
index 0f3c8a08e6..29bea2b60f 100644
--- a/src/soc/intel/denverton_ns/chip.c
+++ b/src/soc/intel/denverton_ns/chip.c
@@ -21,6 +21,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <fsp/api.h>
#include <fsp/util.h>
#include <intelblocks/fast_spi.h>
diff --git a/src/soc/intel/denverton_ns/lpc.c b/src/soc/intel/denverton_ns/lpc.c
index dbc5eccf96..5f16f04393 100644
--- a/src/soc/intel/denverton_ns/lpc.c
+++ b/src/soc/intel/denverton_ns/lpc.c
@@ -19,6 +19,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
#include <cpu/x86/smm.h>
diff --git a/src/soc/intel/denverton_ns/pmc.c b/src/soc/intel/denverton_ns/pmc.c
index fe1b7058ba..193e41c2fc 100644
--- a/src/soc/intel/denverton_ns/pmc.c
+++ b/src/soc/intel/denverton_ns/pmc.c
@@ -16,6 +16,7 @@
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/denverton_ns/romstage.c b/src/soc/intel/denverton_ns/romstage.c
index 34fd7bbd25..5df8b7193a 100644
--- a/src/soc/intel/denverton_ns/romstage.c
+++ b/src/soc/intel/denverton_ns/romstage.c
@@ -18,6 +18,7 @@
#include <cf9_reset.h>
#include <console/console.h>
#include <cpu/x86/mtrr.h>
+#include <device/pci_ops.h>
#include <soc/fiamux.h>
#include <soc/iomap.h>
#include <soc/pci_devs.h>
diff --git a/src/soc/intel/denverton_ns/sata.c b/src/soc/intel/denverton_ns/sata.c
index 9d0bdfcec0..844a037afa 100644
--- a/src/soc/intel/denverton_ns/sata.c
+++ b/src/soc/intel/denverton_ns/sata.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/denverton_ns/smihandler.c b/src/soc/intel/denverton_ns/smihandler.c
index 85f99d7966..9961778321 100644
--- a/src/soc/intel/denverton_ns/smihandler.c
+++ b/src/soc/intel/denverton_ns/smihandler.c
@@ -19,6 +19,7 @@
#include <stdlib.h>
#include <arch/hlt.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
diff --git a/src/soc/intel/denverton_ns/soc_util.c b/src/soc/intel/denverton_ns/soc_util.c
index b56c8396d9..fcfeaf7fb2 100644
--- a/src/soc/intel/denverton_ns/soc_util.c
+++ b/src/soc/intel/denverton_ns/soc_util.c
@@ -16,6 +16,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci.h>
#include <device/pci_def.h>
#include <device/device.h>
diff --git a/src/soc/intel/denverton_ns/systemagent.c b/src/soc/intel/denverton_ns/systemagent.c
index abce0abfba..65cbbfb81a 100644
--- a/src/soc/intel/denverton_ns/systemagent.c
+++ b/src/soc/intel/denverton_ns/systemagent.c
@@ -18,6 +18,7 @@
#include <console/console.h>
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <stdint.h>
#include <delay.h>
#include <device/device.h>
diff --git a/src/soc/intel/denverton_ns/uart.c b/src/soc/intel/denverton_ns/uart.c
index 78f1d56fd0..ac779d050d 100644
--- a/src/soc/intel/denverton_ns/uart.c
+++ b/src/soc/intel/denverton_ns/uart.c
@@ -23,6 +23,7 @@
#include <console/uart.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <soc/pci_devs.h>
#include <console/console.h>
diff --git a/src/soc/intel/denverton_ns/uart_debug.c b/src/soc/intel/denverton_ns/uart_debug.c
index f909d56232..5911a451e5 100644
--- a/src/soc/intel/denverton_ns/uart_debug.c
+++ b/src/soc/intel/denverton_ns/uart_debug.c
@@ -16,8 +16,8 @@
#include <stdint.h>
#include <device/pci_def.h>
+#include <device/pci_ops.h>
#include <io.h>
-#include <arch/pci_io_cfg.h>
#include <soc/uart.h>
#define MY_PCI_DEV(SEGBUS, DEV, FN) \
diff --git a/src/soc/intel/denverton_ns/xhci.c b/src/soc/intel/denverton_ns/xhci.c
index 5f8482e644..1395a0710c 100644
--- a/src/soc/intel/denverton_ns/xhci.c
+++ b/src/soc/intel/denverton_ns/xhci.c
@@ -19,6 +19,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
diff --git a/src/soc/intel/fsp_baytrail/acpi.c b/src/soc/intel/fsp_baytrail/acpi.c
index 9d591fbe13..48568d11ff 100644
--- a/src/soc/intel/fsp_baytrail/acpi.c
+++ b/src/soc/intel/fsp_baytrail/acpi.c
@@ -38,6 +38,7 @@
#include <soc/irq.h>
#include <soc/iosf.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <soc/msr.h>
#include <soc/pattrs.h>
#include <cbmem.h>
diff --git a/src/soc/intel/fsp_baytrail/bootblock/bootblock.c b/src/soc/intel/fsp_baytrail/bootblock/bootblock.c
index 8ce0a1d523..315c1a2f1b 100644
--- a/src/soc/intel/fsp_baytrail/bootblock/bootblock.c
+++ b/src/soc/intel/fsp_baytrail/bootblock/bootblock.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
diff --git a/src/soc/intel/fsp_baytrail/chip.c b/src/soc/intel/fsp_baytrail/chip.c
index a041b81da6..c74c847512 100644
--- a/src/soc/intel/fsp_baytrail/chip.c
+++ b/src/soc/intel/fsp_baytrail/chip.c
@@ -16,6 +16,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
#include <drivers/intel/fsp1_0/fsp_util.h>
diff --git a/src/soc/intel/fsp_baytrail/i2c.c b/src/soc/intel/fsp_baytrail/i2c.c
index 22e565fd46..fbbbfe9089 100644
--- a/src/soc/intel/fsp_baytrail/i2c.c
+++ b/src/soc/intel/fsp_baytrail/i2c.c
@@ -14,6 +14,7 @@
*/
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <soc/baytrail.h>
#include <soc/pci_devs.h>
#include <soc/iosf.h>
diff --git a/src/soc/intel/fsp_baytrail/iosf.c b/src/soc/intel/fsp_baytrail/iosf.c
index 35000254b4..252d69e29d 100644
--- a/src/soc/intel/fsp_baytrail/iosf.c
+++ b/src/soc/intel/fsp_baytrail/iosf.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <soc/iosf.h>
#if !defined(__PRE_RAM__)
diff --git a/src/soc/intel/fsp_baytrail/lpe.c b/src/soc/intel/fsp_baytrail/lpe.c
index 84a10fd9cd..a5a18b71f9 100644
--- a/src/soc/intel/fsp_baytrail/lpe.c
+++ b/src/soc/intel/fsp_baytrail/lpe.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/soc/intel/fsp_baytrail/pmutil.c b/src/soc/intel/fsp_baytrail/pmutil.c
index 6e4a7c8ef5..03d0e8f5a1 100644
--- a/src/soc/intel/fsp_baytrail/pmutil.c
+++ b/src/soc/intel/fsp_baytrail/pmutil.c
@@ -15,6 +15,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/soc/intel/fsp_baytrail/romstage/report_platform.c b/src/soc/intel/fsp_baytrail/romstage/report_platform.c
index 4c91b0aed6..ab5c5825ba 100644
--- a/src/soc/intel/fsp_baytrail/romstage/report_platform.c
+++ b/src/soc/intel/fsp_baytrail/romstage/report_platform.c
@@ -16,6 +16,7 @@
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <soc/iosf.h>
#include <soc/romstage.h>
#include <cpu/x86/msr.h>
diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c
index 19a0d44ecb..83121fad07 100644
--- a/src/soc/intel/fsp_baytrail/romstage/romstage.c
+++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c
@@ -17,6 +17,7 @@
#include <stddef.h>
#include <lib.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/cbfs.h>
#include <arch/early_variables.h>
#include <console/console.h>
diff --git a/src/soc/intel/fsp_baytrail/romstage/uart.c b/src/soc/intel/fsp_baytrail/romstage/uart.c
index 10a00f8524..d18f9d7d21 100644
--- a/src/soc/intel/fsp_baytrail/romstage/uart.c
+++ b/src/soc/intel/fsp_baytrail/romstage/uart.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <soc/gpio.h>
#include <soc/iomap.h>
#include <soc/lpc.h>
diff --git a/src/soc/intel/fsp_baytrail/smihandler.c b/src/soc/intel/fsp_baytrail/smihandler.c
index e8021cef26..ee0929d83d 100644
--- a/src/soc/intel/fsp_baytrail/smihandler.c
+++ b/src/soc/intel/fsp_baytrail/smihandler.c
@@ -16,6 +16,7 @@
#include <stdint.h>
#include <stdlib.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
diff --git a/src/soc/intel/fsp_baytrail/southcluster.c b/src/soc/intel/fsp_baytrail/southcluster.c
index f0028f4806..3c268084a7 100644
--- a/src/soc/intel/fsp_baytrail/southcluster.c
+++ b/src/soc/intel/fsp_baytrail/southcluster.c
@@ -18,6 +18,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/ioapic.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/soc/intel/fsp_baytrail/spi.c b/src/soc/intel/fsp_baytrail/spi.c
index 275b038b39..025588899d 100644
--- a/src/soc/intel/fsp_baytrail/spi.c
+++ b/src/soc/intel/fsp_baytrail/spi.c
@@ -21,6 +21,7 @@
#include <commonlib/helpers.h>
#include <delay.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/fsp_broadwell_de/acpi.c b/src/soc/intel/fsp_broadwell_de/acpi.c
index 784e0cb8be..a0c9ee538e 100644
--- a/src/soc/intel/fsp_broadwell_de/acpi.c
+++ b/src/soc/intel/fsp_broadwell_de/acpi.c
@@ -21,6 +21,7 @@
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/smp/mpspec.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
diff --git a/src/soc/intel/fsp_broadwell_de/chip.c b/src/soc/intel/fsp_broadwell_de/chip.c
index 5cdedcaadb..f6dd2a7021 100644
--- a/src/soc/intel/fsp_broadwell_de/chip.c
+++ b/src/soc/intel/fsp_broadwell_de/chip.c
@@ -19,6 +19,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <drivers/intel/fsp1_0/fsp_util.h>
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
diff --git a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c
index 8ddca26be5..e46bcd046e 100644
--- a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c
+++ b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c
@@ -18,6 +18,7 @@
#include <stddef.h>
#include <lib.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/cbfs.h>
#include <cbmem.h>
#include <console/console.h>
diff --git a/src/soc/intel/fsp_broadwell_de/smmrelocate.c b/src/soc/intel/fsp_broadwell_de/smmrelocate.c
index a58744e774..dae17126c4 100644
--- a/src/soc/intel/fsp_broadwell_de/smmrelocate.c
+++ b/src/soc/intel/fsp_broadwell_de/smmrelocate.c
@@ -25,6 +25,7 @@
#include <cpu/x86/smm.h>
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <soc/lpc.h>
#include <soc/msr.h>
#include <soc/pci_devs.h>
diff --git a/src/soc/intel/fsp_broadwell_de/southcluster.c b/src/soc/intel/fsp_broadwell_de/southcluster.c
index da11f249c6..5c0cb7e5ab 100644
--- a/src/soc/intel/fsp_broadwell_de/southcluster.c
+++ b/src/soc/intel/fsp_broadwell_de/southcluster.c
@@ -18,6 +18,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/fsp_broadwell_de/vtd.c b/src/soc/intel/fsp_broadwell_de/vtd.c
index 8f6b278a2e..318927ab80 100644
--- a/src/soc/intel/fsp_broadwell_de/vtd.c
+++ b/src/soc/intel/fsp_broadwell_de/vtd.c
@@ -14,6 +14,7 @@
*/
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <soc/pci_devs.h>
#include <soc/acpi.h>
diff --git a/src/soc/intel/icelake/bootblock/pch.c b/src/soc/intel/icelake/bootblock/pch.c
index 2afb358726..00de28e10d 100644
--- a/src/soc/intel/icelake/bootblock/pch.c
+++ b/src/soc/intel/icelake/bootblock/pch.c
@@ -15,6 +15,7 @@
#include <console/console.h>
#include <device/device.h>
+#include <device/pci_ops.h>
#include <intelblocks/fast_spi.h>
#include <intelblocks/gspi.h>
#include <intelblocks/lpc_lib.h>
diff --git a/src/soc/intel/icelake/bootblock/report_platform.c b/src/soc/intel/icelake/bootblock/report_platform.c
index 05ae25fcc9..0b932a92b3 100644
--- a/src/soc/intel/icelake/bootblock/report_platform.c
+++ b/src/soc/intel/icelake/bootblock/report_platform.c
@@ -15,6 +15,7 @@
#include <arch/cpu.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
#include <device/pci.h>
diff --git a/src/soc/intel/icelake/graphics.c b/src/soc/intel/icelake/graphics.c
index 1c22f49a7b..f0ad0e25a0 100644
--- a/src/soc/intel/icelake/graphics.c
+++ b/src/soc/intel/icelake/graphics.c
@@ -19,6 +19,7 @@
#include <fsp/util.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <drivers/intel/gma/i915_reg.h>
#include <drivers/intel/gma/opregion.h>
#include <intelblocks/graphics.h>
diff --git a/src/soc/intel/icelake/lpc.c b/src/soc/intel/icelake/lpc.c
index 422ba1e3f5..e195865143 100644
--- a/src/soc/intel/icelake/lpc.c
+++ b/src/soc/intel/icelake/lpc.c
@@ -21,6 +21,7 @@
#include <pc80/isa-dma.h>
#include <pc80/i8259.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/ioapic.h>
#include <intelblocks/itss.h>
#include <intelblocks/lpc_lib.h>
diff --git a/src/soc/intel/icelake/smmrelocate.c b/src/soc/intel/icelake/smmrelocate.c
index 57a366a906..05871e4f23 100644
--- a/src/soc/intel/icelake/smmrelocate.c
+++ b/src/soc/intel/icelake/smmrelocate.c
@@ -17,6 +17,7 @@
#include <string.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <cpu/cpu.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/lapic.h>
diff --git a/src/soc/intel/quark/include/soc/ramstage.h b/src/soc/intel/quark/include/soc/ramstage.h
index da2eb61557..67e37de943 100644
--- a/src/soc/intel/quark/include/soc/ramstage.h
+++ b/src/soc/intel/quark/include/soc/ramstage.h
@@ -20,6 +20,7 @@
#include <arch/cpu.h>
#include <chip.h>
#include <device/device.h>
+#include <device/pci_ops.h>
#include <soc/QuarkNcSocId.h>
void mainboard_gpio_i2c_init(struct device *dev);
diff --git a/src/soc/intel/quark/reg_access.c b/src/soc/intel/quark/reg_access.c
index 867a4316a8..50a8ff0a29 100644
--- a/src/soc/intel/quark/reg_access.c
+++ b/src/soc/intel/quark/reg_access.c
@@ -18,6 +18,7 @@
#include <assert.h>
#include <cpu/x86/mtrr.h>
#include <console/console.h>
+#include <device/pci_ops.h>
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
#include <soc/reg_access.h>
diff --git a/src/soc/intel/quark/romstage/report_platform.c b/src/soc/intel/quark/romstage/report_platform.c
index 640f5b0594..cbbf43f982 100644
--- a/src/soc/intel/quark/romstage/report_platform.c
+++ b/src/soc/intel/quark/romstage/report_platform.c
@@ -17,6 +17,7 @@
#include <arch/cpu.h>
#include <console/console.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <soc/cpu.h>
#include <soc/pci_devs.h>
diff --git a/src/soc/intel/quark/spi.c b/src/soc/intel/quark/spi.c
index 4b011b715b..d7b29e7dc7 100644
--- a/src/soc/intel/quark/spi.c
+++ b/src/soc/intel/quark/spi.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <assert.h>
#include <bootstate.h>
#include <console/console.h>
diff --git a/src/soc/intel/quark/storage_test.c b/src/soc/intel/quark/storage_test.c
index d3cd1d3f83..0d0543e1f6 100644
--- a/src/soc/intel/quark/storage_test.c
+++ b/src/soc/intel/quark/storage_test.c
@@ -15,6 +15,7 @@
#include <arch/early_variables.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <assert.h>
#include <cbmem.h>
#include <commonlib/cbmem_id.h>
diff --git a/src/soc/intel/skylake/bootblock/pch.c b/src/soc/intel/skylake/bootblock/pch.c
index 6403ed3ee7..f46345b455 100644
--- a/src/soc/intel/skylake/bootblock/pch.c
+++ b/src/soc/intel/skylake/bootblock/pch.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <chip.h>
#include <device/device.h>
#include <device/pci_def.h>
diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c
index c245523947..e6e4ba4e2a 100644
--- a/src/soc/intel/skylake/bootblock/report_platform.c
+++ b/src/soc/intel/skylake/bootblock/report_platform.c
@@ -16,6 +16,7 @@
#include <arch/cpu.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
#include <device/pci.h>
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
index c9afeb40df..a107a3047b 100644
--- a/src/soc/intel/skylake/chip_fsp20.c
+++ b/src/soc/intel/skylake/chip_fsp20.c
@@ -20,6 +20,7 @@
#include <fsp/api.h>
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci_ids.h>
diff --git a/src/soc/intel/skylake/finalize.c b/src/soc/intel/skylake/finalize.c
index 4c8a1299a8..e337d8b976 100644
--- a/src/soc/intel/skylake/finalize.c
+++ b/src/soc/intel/skylake/finalize.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <bootstate.h>
#include <chip.h>
#include <console/console.h>
diff --git a/src/soc/intel/skylake/graphics.c b/src/soc/intel/skylake/graphics.c
index e67d82f3b0..1bf6ba410c 100644
--- a/src/soc/intel/skylake/graphics.c
+++ b/src/soc/intel/skylake/graphics.c
@@ -18,6 +18,7 @@
#include <cbmem.h>
#include <console/console.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <drivers/intel/gma/i915_reg.h>
#include <drivers/intel/gma/libgfxinit.h>
#include <intelblocks/graphics.h>
diff --git a/src/soc/intel/skylake/irq.c b/src/soc/intel/skylake/irq.c
index 7b3e1bd395..d10ca74f1e 100644
--- a/src/soc/intel/skylake/irq.c
+++ b/src/soc/intel/skylake/irq.c
@@ -15,6 +15,7 @@
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <intelblocks/lpc_lib.h>
#include <intelblocks/itss.h>
#include <soc/ramstage.h>
diff --git a/src/soc/intel/skylake/me.c b/src/soc/intel/skylake/me.c
index f67086b22e..72d6655dc7 100644
--- a/src/soc/intel/skylake/me.c
+++ b/src/soc/intel/skylake/me.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <bootstate.h>
#include <commonlib/helpers.h>
#include <console/console.h>
diff --git a/src/soc/intel/skylake/pmutil.c b/src/soc/intel/skylake/pmutil.c
index a79cf041b3..40075536f3 100644
--- a/src/soc/intel/skylake/pmutil.c
+++ b/src/soc/intel/skylake/pmutil.c
@@ -21,6 +21,7 @@
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_def.h>
diff --git a/src/soc/intel/skylake/romstage/systemagent.c b/src/soc/intel/skylake/romstage/systemagent.c
index 0c8e9e7b9e..00a2782723 100644
--- a/src/soc/intel/skylake/romstage/systemagent.c
+++ b/src/soc/intel/skylake/romstage/systemagent.c
@@ -16,6 +16,7 @@
*/
#include <device/device.h>
+#include <device/pci_ops.h>
#include <intelblocks/systemagent.h>
#include <soc/iomap.h>
#include <soc/pci_devs.h>
diff --git a/src/soc/intel/skylake/smmrelocate.c b/src/soc/intel/skylake/smmrelocate.c
index cb4e23fc94..12ed26a56e 100644
--- a/src/soc/intel/skylake/smmrelocate.c
+++ b/src/soc/intel/skylake/smmrelocate.c
@@ -18,6 +18,7 @@
#include <string.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/mp.h>
diff --git a/src/soc/intel/skylake/thermal.c b/src/soc/intel/skylake/thermal.c
index c1b4ce31d4..eef42b2b31 100644
--- a/src/soc/intel/skylake/thermal.c
+++ b/src/soc/intel/skylake/thermal.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <chip.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/southbridge/amd/agesa/hudson/bootblock.c b/src/southbridge/amd/agesa/hudson/bootblock.c
index bb6a54ba42..a10068701c 100644
--- a/src/southbridge/amd/agesa/hudson/bootblock.c
+++ b/src/southbridge/amd/agesa/hudson/bootblock.c
@@ -15,6 +15,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
/*
* Enable 4MB (LPC) ROM access at 0xFFC00000 - 0xFFFFFFFF.
diff --git a/src/southbridge/amd/agesa/hudson/early_setup.c b/src/southbridge/amd/agesa/hudson/early_setup.c
index af0cb58f6c..622931520f 100644
--- a/src/southbridge/amd/agesa/hudson/early_setup.c
+++ b/src/southbridge/amd/agesa/hudson/early_setup.c
@@ -18,6 +18,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/acpi.h>
#include <console/console.h>
#include <reset.h>
diff --git a/src/southbridge/amd/agesa/hudson/reset.c b/src/southbridge/amd/agesa/hudson/reset.c
index 83eaa46bb4..64f947eb67 100644
--- a/src/southbridge/amd/agesa/hudson/reset.c
+++ b/src/southbridge/amd/agesa/hudson/reset.c
@@ -17,6 +17,7 @@
#define __SIMPLE_DEVICE__
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cf9_reset.h>
#include <reset.h>
diff --git a/src/southbridge/amd/amd8111/amd8111.c b/src/southbridge/amd/amd8111/amd8111.c
index fae22ada3b..cbf0d30859 100644
--- a/src/southbridge/amd/amd8111/amd8111.c
+++ b/src/southbridge/amd/amd8111/amd8111.c
@@ -13,6 +13,7 @@
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include "amd8111.h"
diff --git a/src/southbridge/amd/amd8111/bootblock.c b/src/southbridge/amd/amd8111/bootblock.c
index 0abd999efe..90ba000172 100644
--- a/src/southbridge/amd/amd8111/bootblock.c
+++ b/src/southbridge/amd/amd8111/bootblock.c
@@ -16,6 +16,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <device/pci_type.h>
diff --git a/src/southbridge/amd/amd8111/early_smbus.c b/src/southbridge/amd/amd8111/early_smbus.c
index 4925c86abe..15a03f5306 100644
--- a/src/southbridge/amd/amd8111/early_smbus.c
+++ b/src/southbridge/amd/amd8111/early_smbus.c
@@ -11,6 +11,7 @@
* GNU General Public License for more details.
*/
+#include <device/pci_ops.h>
#include "amd8111_smbus.h"
#define SMBUS_IO_BASE 0x0f00
diff --git a/src/southbridge/amd/amd8111/reset.c b/src/southbridge/amd/amd8111/reset.c
index 62ae99e414..e1ac8a98ed 100644
--- a/src/southbridge/amd/amd8111/reset.c
+++ b/src/southbridge/amd/amd8111/reset.c
@@ -15,6 +15,7 @@
#define __SIMPLE_DEVICE__
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <reset.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/southbridge/amd/cimx/sb800/bootblock.c b/src/southbridge/amd/cimx/sb800/bootblock.c
index 585d5a8f87..dae8df8288 100644
--- a/src/southbridge/amd/cimx/sb800/bootblock.c
+++ b/src/southbridge/amd/cimx/sb800/bootblock.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
static void enable_rom(void)
{
diff --git a/src/southbridge/amd/cimx/sb800/fan.c b/src/southbridge/amd/cimx/sb800/fan.c
index db87b6ac87..a8dfa31d9a 100644
--- a/src/southbridge/amd/cimx/sb800/fan.c
+++ b/src/southbridge/amd/cimx/sb800/fan.c
@@ -16,6 +16,7 @@
#include <southbridge/amd/cimx/cimx_util.h>
#include <device/device.h>
#include <device/pci.h> /* device_operations */
+#include <device/pci_ops.h>
#include "SBPLATFORM.h"
#include "sb_cimx.h"
#include "chip.h" /* struct southbridge_amd_cimx_sb800_config */
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c
index c66206f55c..872e045a1d 100644
--- a/src/southbridge/amd/cimx/sb800/late.c
+++ b/src/southbridge/amd/cimx/sb800/late.c
@@ -17,6 +17,7 @@
#include <device/device.h>
#include <device/pci.h> /* device_operations */
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <bootstate.h>
#include <arch/ioapic.h>
diff --git a/src/southbridge/amd/cimx/sb800/lpc.c b/src/southbridge/amd/cimx/sb800/lpc.c
index 2759af6488..8573f6fafe 100644
--- a/src/southbridge/amd/cimx/sb800/lpc.c
+++ b/src/southbridge/amd/cimx/sb800/lpc.c
@@ -20,6 +20,7 @@
#include <arch/ioapic.h>
#include "lpc.h"
#include <arch/io.h>
+#include <device/pci_ops.h>
void lpc_read_resources(struct device *dev)
{
diff --git a/src/southbridge/amd/cimx/sb800/reset.c b/src/southbridge/amd/cimx/sb800/reset.c
index db0aebb9ee..4b96d3c8c0 100644
--- a/src/southbridge/amd/cimx/sb800/reset.c
+++ b/src/southbridge/amd/cimx/sb800/reset.c
@@ -17,6 +17,7 @@
#define __SIMPLE_DEVICE__
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cf9_reset.h>
#include <reset.h>
diff --git a/src/southbridge/amd/cimx/sb900/bootblock.c b/src/southbridge/amd/cimx/sb900/bootblock.c
index a06946352c..734cc7a831 100644
--- a/src/southbridge/amd/cimx/sb900/bootblock.c
+++ b/src/southbridge/amd/cimx/sb900/bootblock.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
static void sb900_enable_rom(void)
{
diff --git a/src/southbridge/amd/cimx/sb900/lpc.c b/src/southbridge/amd/cimx/sb900/lpc.c
index 64b6aa51de..b04ecfa123 100644
--- a/src/southbridge/amd/cimx/sb900/lpc.c
+++ b/src/southbridge/amd/cimx/sb900/lpc.c
@@ -14,6 +14,7 @@
*/
#include <device/pci.h>
+#include <device/pci_ops.h>
#include "lpc.h"
#include <console/console.h> /* printk */
#include <arch/ioapic.h>
diff --git a/src/southbridge/amd/cimx/sb900/reset.c b/src/southbridge/amd/cimx/sb900/reset.c
index db0aebb9ee..4b96d3c8c0 100644
--- a/src/southbridge/amd/cimx/sb900/reset.c
+++ b/src/southbridge/amd/cimx/sb900/reset.c
@@ -17,6 +17,7 @@
#define __SIMPLE_DEVICE__
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cf9_reset.h>
#include <reset.h>
diff --git a/src/southbridge/amd/common/amd_pci_util.c b/src/southbridge/amd/common/amd_pci_util.c
index ca76809bf3..8bb2e0e4ef 100644
--- a/src/southbridge/amd/common/amd_pci_util.c
+++ b/src/southbridge/amd/common/amd_pci_util.c
@@ -16,6 +16,7 @@
#include <console/console.h>
#include <device/pci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <string.h>
#include "amd_pci_util.h"
#include <pc80/i8259.h>
diff --git a/src/southbridge/amd/pi/hudson/bootblock.c b/src/southbridge/amd/pi/hudson/bootblock.c
index 32b129862d..0f5bdb142b 100644
--- a/src/southbridge/amd/pi/hudson/bootblock.c
+++ b/src/southbridge/amd/pi/hudson/bootblock.c
@@ -15,6 +15,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
/*
diff --git a/src/southbridge/amd/pi/hudson/early_setup.c b/src/southbridge/amd/pi/hudson/early_setup.c
index 3b91f9b813..0bed6ad17e 100644
--- a/src/southbridge/amd/pi/hudson/early_setup.c
+++ b/src/southbridge/amd/pi/hudson/early_setup.c
@@ -19,6 +19,7 @@
#include <assert.h>
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/acpi.h>
#include <console/console.h>
#include <reset.h>
diff --git a/src/southbridge/amd/pi/hudson/imc.c b/src/southbridge/amd/pi/hudson/imc.c
index bb630149b8..4b41ab5749 100644
--- a/src/southbridge/amd/pi/hudson/imc.c
+++ b/src/southbridge/amd/pi/hudson/imc.c
@@ -17,6 +17,7 @@
#include "imc.h"
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <delay.h>
#include <Porting.h>
diff --git a/src/southbridge/amd/pi/hudson/reset.c b/src/southbridge/amd/pi/hudson/reset.c
index 83eaa46bb4..64f947eb67 100644
--- a/src/southbridge/amd/pi/hudson/reset.c
+++ b/src/southbridge/amd/pi/hudson/reset.c
@@ -17,6 +17,7 @@
#define __SIMPLE_DEVICE__
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cf9_reset.h>
#include <reset.h>
diff --git a/src/southbridge/amd/rs780/early_setup.c b/src/southbridge/amd/rs780/early_setup.c
index 017c76470a..0332f2f872 100644
--- a/src/southbridge/amd/rs780/early_setup.c
+++ b/src/southbridge/amd/rs780/early_setup.c
@@ -15,6 +15,7 @@
#include <types.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <northbridge/amd/amdmct/mct/mct_d.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
diff --git a/src/southbridge/amd/sb700/bootblock.c b/src/southbridge/amd/sb700/bootblock.c
index 364fa01c51..ed6f2561f5 100644
--- a/src/southbridge/amd/sb700/bootblock.c
+++ b/src/southbridge/amd/sb700/bootblock.c
@@ -16,6 +16,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#define IO_MEM_PORT_DECODE_ENABLE_5 0x48
#define IO_MEM_PORT_DECODE_ENABLE_6 0x4a
diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c
index 167986fa67..af2b6c1bce 100644
--- a/src/southbridge/amd/sb700/early_setup.c
+++ b/src/southbridge/amd/sb700/early_setup.c
@@ -20,6 +20,7 @@
#include <stdint.h>
#include <option.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
#include <device/pci.h>
diff --git a/src/southbridge/amd/sb700/reset.c b/src/southbridge/amd/sb700/reset.c
index 4c9b0f4056..9a04459799 100644
--- a/src/southbridge/amd/sb700/reset.c
+++ b/src/southbridge/amd/sb700/reset.c
@@ -17,6 +17,7 @@
#define __SIMPLE_DEVICE__
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <reset.h>
#include <southbridge/amd/common/reset.h>
diff --git a/src/southbridge/amd/sb700/sb700.h b/src/southbridge/amd/sb700/sb700.h
index 0b638f65c4..156522e579 100644
--- a/src/southbridge/amd/sb700/sb700.h
+++ b/src/southbridge/amd/sb700/sb700.h
@@ -73,6 +73,7 @@ void sb7xx_51xx_before_pci_init(void);
uint16_t sb7xx_51xx_decode_last_reset(void);
#else
#include <device/pci.h>
+#include <device/pci_ops.h>
/* allow override in mainboard.c */
void sb7xx_51xx_setup_sata_phys(struct device *dev);
void sb7xx_51xx_setup_sata_port_indication(void *sata_bar5);
diff --git a/src/southbridge/amd/sb800/bootblock.c b/src/southbridge/amd/sb800/bootblock.c
index b08d4775c4..9062118a90 100644
--- a/src/southbridge/amd/sb800/bootblock.c
+++ b/src/southbridge/amd/sb800/bootblock.c
@@ -15,6 +15,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
/*
* Enable 4MB (LPC) ROM access at 0xFFC00000 - 0xFFFFFFFF.
diff --git a/src/southbridge/amd/sr5650/cmn.h b/src/southbridge/amd/sr5650/cmn.h
index 126b786246..30aeed25d6 100644
--- a/src/southbridge/amd/sr5650/cmn.h
+++ b/src/southbridge/amd/sr5650/cmn.h
@@ -18,6 +18,7 @@
#define __SR5650_CMN_H__
#include <arch/io.h>
+#include <device/pci_ops.h>
#define NBMISC_INDEX 0x60
#define NBHTIU_INDEX 0x94 /* Note: It is different with RS690, whose HTIU index is 0xA8 */
diff --git a/src/southbridge/amd/sr5650/early_setup.c b/src/southbridge/amd/sr5650/early_setup.c
index 8b6f22a793..8671882a9f 100644
--- a/src/southbridge/amd/sr5650/early_setup.c
+++ b/src/southbridge/amd/sr5650/early_setup.c
@@ -18,6 +18,7 @@
#include <stdint.h>
#include <arch/cpu.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/msr.h>
diff --git a/src/southbridge/broadcom/bcm5785/bcm5785.c b/src/southbridge/broadcom/bcm5785/bcm5785.c
index 53ee8d4698..beaa94aeef 100644
--- a/src/southbridge/broadcom/bcm5785/bcm5785.c
+++ b/src/southbridge/broadcom/bcm5785/bcm5785.c
@@ -16,6 +16,7 @@
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include "bcm5785.h"
diff --git a/src/southbridge/broadcom/bcm5785/bootblock.c b/src/southbridge/broadcom/bcm5785/bootblock.c
index 62b20a3f7b..3f7443694d 100644
--- a/src/southbridge/broadcom/bcm5785/bootblock.c
+++ b/src/southbridge/broadcom/bcm5785/bootblock.c
@@ -16,6 +16,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <device/pci_type.h>
diff --git a/src/southbridge/broadcom/bcm5785/early_smbus.c b/src/southbridge/broadcom/bcm5785/early_smbus.c
index c702c651ba..260f1fc01a 100644
--- a/src/southbridge/broadcom/bcm5785/early_smbus.c
+++ b/src/southbridge/broadcom/bcm5785/early_smbus.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <device/pci_ops.h>
#include "smbus.h"
#define SMBUS_IO_BASE 0x1000
diff --git a/src/southbridge/intel/bd82x6x/bootblock.c b/src/southbridge/intel/bd82x6x/bootblock.c
index 673f0c74af..b0b8afa9eb 100644
--- a/src/southbridge/intel/bd82x6x/bootblock.c
+++ b/src/southbridge/intel/bd82x6x/bootblock.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include "pch.h"
/*
diff --git a/src/southbridge/intel/bd82x6x/early_me.c b/src/southbridge/intel/bd82x6x/early_me.c
index ee149d09b5..edb514bda7 100644
--- a/src/southbridge/intel/bd82x6x/early_me.c
+++ b/src/southbridge/intel/bd82x6x/early_me.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <delay.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/bd82x6x/early_me_mrc.c b/src/southbridge/intel/bd82x6x/early_me_mrc.c
index ed27573235..f6b26bf9e6 100644
--- a/src/southbridge/intel/bd82x6x/early_me_mrc.c
+++ b/src/southbridge/intel/bd82x6x/early_me_mrc.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <delay.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c
index 167311f2ba..2e1c5fc2a2 100644
--- a/src/southbridge/intel/bd82x6x/early_pch.c
+++ b/src/southbridge/intel/bd82x6x/early_pch.c
@@ -15,6 +15,7 @@
#include <string.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/cbfs.h>
#include <ip_checksum.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/bd82x6x/early_smbus.c b/src/southbridge/intel/bd82x6x/early_smbus.c
index 3cd98ac5e4..d3847a5018 100644
--- a/src/southbridge/intel/bd82x6x/early_smbus.c
+++ b/src/southbridge/intel/bd82x6x/early_smbus.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/pci_def.h>
#include <southbridge/intel/common/smbus.h>
diff --git a/src/southbridge/intel/bd82x6x/early_thermal.c b/src/southbridge/intel/bd82x6x/early_thermal.c
index a5c63b617f..f29ba5da6a 100644
--- a/src/southbridge/intel/bd82x6x/early_thermal.c
+++ b/src/southbridge/intel/bd82x6x/early_thermal.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include "pch.h"
#include "cpu/intel/model_206ax/model_206ax.h"
#include <cpu/x86/msr.h>
diff --git a/src/southbridge/intel/bd82x6x/early_usb.c b/src/southbridge/intel/bd82x6x/early_usb.c
index c34b3ec816..a7321c9991 100644
--- a/src/southbridge/intel/bd82x6x/early_usb.c
+++ b/src/southbridge/intel/bd82x6x/early_usb.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include "pch.h"
diff --git a/src/southbridge/intel/bd82x6x/early_usb_mrc.c b/src/southbridge/intel/bd82x6x/early_usb_mrc.c
index e4fadad6cb..a19794e819 100644
--- a/src/southbridge/intel/bd82x6x/early_usb_mrc.c
+++ b/src/southbridge/intel/bd82x6x/early_usb_mrc.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include "pch.h"
diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c
index 1bbce066bf..f5516e39e9 100644
--- a/src/southbridge/intel/bd82x6x/me.c
+++ b/src/southbridge/intel/bd82x6x/me.c
@@ -24,6 +24,7 @@
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c
index dc78e7184f..951c8ab4e4 100644
--- a/src/southbridge/intel/bd82x6x/me_8.x.c
+++ b/src/southbridge/intel/bd82x6x/me_8.x.c
@@ -24,6 +24,7 @@
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c
index 1a646b17b9..88ee0cbb38 100644
--- a/src/southbridge/intel/bd82x6x/pch.c
+++ b/src/southbridge/intel/bd82x6x/pch.c
@@ -24,6 +24,7 @@
#include <device/device.h>
#include <device/pci.h>
#endif
+#include <device/pci_ops.h>
#include "pch.h"
#include <string.h>
diff --git a/src/southbridge/intel/bd82x6x/pci.c b/src/southbridge/intel/bd82x6x/pci.c
index f86d8a01e4..4a62eb84a0 100644
--- a/src/southbridge/intel/bd82x6x/pci.c
+++ b/src/southbridge/intel/bd82x6x/pci.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include "pch.h"
diff --git a/src/southbridge/intel/bd82x6x/pcie.c b/src/southbridge/intel/bd82x6x/pcie.c
index 560584165b..39c53e88fc 100644
--- a/src/southbridge/intel/bd82x6x/pcie.c
+++ b/src/southbridge/intel/bd82x6x/pcie.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pciexp.h>
#include <device/pci_ids.h>
#include <southbridge/intel/common/pciehp.h>
diff --git a/src/southbridge/intel/bd82x6x/sata.c b/src/southbridge/intel/bd82x6x/sata.c
index 00a65c8659..02d478ccb0 100644
--- a/src/southbridge/intel/bd82x6x/sata.c
+++ b/src/southbridge/intel/bd82x6x/sata.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/southbridge/intel/bd82x6x/smihandler.c b/src/southbridge/intel/bd82x6x/smihandler.c
index 69df2bf68c..c7f668b178 100644
--- a/src/southbridge/intel/bd82x6x/smihandler.c
+++ b/src/southbridge/intel/bd82x6x/smihandler.c
@@ -16,6 +16,7 @@
#include <types.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/bd82x6x/usb_ehci.c b/src/southbridge/intel/bd82x6x/usb_ehci.c
index 996c89c93f..b4060e526f 100644
--- a/src/southbridge/intel/bd82x6x/usb_ehci.c
+++ b/src/southbridge/intel/bd82x6x/usb_ehci.c
@@ -21,6 +21,7 @@
#include "pch.h"
#include <device/pci_ehci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
static void usb_ehci_init(struct device *dev)
{
diff --git a/src/southbridge/intel/bd82x6x/usb_xhci.c b/src/southbridge/intel/bd82x6x/usb_xhci.c
index 1b2755b4ab..d7b25c94b5 100644
--- a/src/southbridge/intel/bd82x6x/usb_xhci.c
+++ b/src/southbridge/intel/bd82x6x/usb_xhci.c
@@ -21,6 +21,7 @@
#include "pch.h"
#include <device/pci_ehci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
static void usb_xhci_init(struct device *dev)
{
diff --git a/src/southbridge/intel/bd82x6x/watchdog.c b/src/southbridge/intel/bd82x6x/watchdog.c
index c186f353ba..4e40dd49f5 100644
--- a/src/southbridge/intel/bd82x6x/watchdog.c
+++ b/src/southbridge/intel/bd82x6x/watchdog.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/common/gpio.c b/src/southbridge/intel/common/gpio.c
index 8a511c331e..1186058cc9 100644
--- a/src/southbridge/intel/common/gpio.c
+++ b/src/southbridge/intel/common/gpio.c
@@ -16,6 +16,7 @@
#include <stdint.h>
#include <string.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/southbridge/intel/common/pmbase.c b/src/southbridge/intel/common/pmbase.c
index 563856c23e..ae13272026 100644
--- a/src/southbridge/intel/common/pmbase.c
+++ b/src/southbridge/intel/common/pmbase.c
@@ -16,6 +16,7 @@
#include <stdint.h>
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
#include <assert.h>
diff --git a/src/southbridge/intel/common/smihandler.c b/src/southbridge/intel/common/smihandler.c
index 4525934970..05b73f20c3 100644
--- a/src/southbridge/intel/common/smihandler.c
+++ b/src/southbridge/intel/common/smihandler.c
@@ -16,6 +16,7 @@
#include <types.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/acpi.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c
index 1d871d2c5d..429de8d447 100644
--- a/src/southbridge/intel/common/spi.c
+++ b/src/southbridge/intel/common/spi.c
@@ -23,6 +23,7 @@
#include <commonlib/helpers.h>
#include <delay.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/southbridge/intel/common/usb_debug.c b/src/southbridge/intel/common/usb_debug.c
index 31f84970d7..83e407860d 100644
--- a/src/southbridge/intel/common/usb_debug.c
+++ b/src/southbridge/intel/common/usb_debug.c
@@ -18,6 +18,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_ehci.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/fsp_rangeley/acpi.c b/src/southbridge/intel/fsp_rangeley/acpi.c
index f88e99987f..e111881581 100644
--- a/src/southbridge/intel/fsp_rangeley/acpi.c
+++ b/src/southbridge/intel/fsp_rangeley/acpi.c
@@ -20,6 +20,7 @@
#include <arch/acpi.h>
#include <southbridge/intel/fsp_rangeley/soc.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <version.h>
#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
diff --git a/src/southbridge/intel/fsp_rangeley/early_init.c b/src/southbridge/intel/fsp_rangeley/early_init.c
index 1ef8cb2add..05e2812134 100644
--- a/src/southbridge/intel/fsp_rangeley/early_init.c
+++ b/src/southbridge/intel/fsp_rangeley/early_init.c
@@ -19,6 +19,7 @@
#include <stdlib.h>
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <pc80/mc146818rtc.h>
#include <version.h>
diff --git a/src/southbridge/intel/fsp_rangeley/early_smbus.c b/src/southbridge/intel/fsp_rangeley/early_smbus.c
index 9b47837dd1..48b7769925 100644
--- a/src/southbridge/intel/fsp_rangeley/early_smbus.c
+++ b/src/southbridge/intel/fsp_rangeley/early_smbus.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/pci_def.h>
#include <southbridge/intel/common/smbus.h>
diff --git a/src/southbridge/intel/fsp_rangeley/early_usb.c b/src/southbridge/intel/fsp_rangeley/early_usb.c
index 0bcd09d65d..896ef64bad 100644
--- a/src/southbridge/intel/fsp_rangeley/early_usb.c
+++ b/src/southbridge/intel/fsp_rangeley/early_usb.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include "soc.h"
diff --git a/src/southbridge/intel/fsp_rangeley/gpio.c b/src/southbridge/intel/fsp_rangeley/gpio.c
index 0a287c4dc4..740587a23c 100644
--- a/src/southbridge/intel/fsp_rangeley/gpio.c
+++ b/src/southbridge/intel/fsp_rangeley/gpio.c
@@ -17,6 +17,7 @@
#include <stdint.h>
#include <string.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include "soc.h"
#include "gpio.h"
diff --git a/src/southbridge/intel/fsp_rangeley/lpc.c b/src/southbridge/intel/fsp_rangeley/lpc.c
index 3e7c17a74e..4dee6362fb 100644
--- a/src/southbridge/intel/fsp_rangeley/lpc.c
+++ b/src/southbridge/intel/fsp_rangeley/lpc.c
@@ -23,6 +23,7 @@
#include <pc80/isa-dma.h>
#include <pc80/i8259.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
#include <arch/cpu.h>
diff --git a/src/southbridge/intel/fsp_rangeley/romstage.c b/src/southbridge/intel/fsp_rangeley/romstage.c
index ec60920ac5..39d4362635 100644
--- a/src/southbridge/intel/fsp_rangeley/romstage.c
+++ b/src/southbridge/intel/fsp_rangeley/romstage.c
@@ -19,6 +19,7 @@
#include <lib.h>
#include <timestamp.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <cpu/x86/lapic.h>
#include <cbmem.h>
diff --git a/src/southbridge/intel/fsp_rangeley/sata.c b/src/southbridge/intel/fsp_rangeley/sata.c
index c1d574941a..c4d6fdaf49 100644
--- a/src/southbridge/intel/fsp_rangeley/sata.c
+++ b/src/southbridge/intel/fsp_rangeley/sata.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/southbridge/intel/fsp_rangeley/soc.c b/src/southbridge/intel/fsp_rangeley/soc.c
index fd83342ac7..ec5cd073ed 100644
--- a/src/southbridge/intel/fsp_rangeley/soc.c
+++ b/src/southbridge/intel/fsp_rangeley/soc.c
@@ -20,6 +20,7 @@
#include <delay.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include "soc.h"
static int soc_revision_id = -1;
diff --git a/src/southbridge/intel/fsp_rangeley/spi.c b/src/southbridge/intel/fsp_rangeley/spi.c
index 227422b270..34d0fa2111 100644
--- a/src/southbridge/intel/fsp_rangeley/spi.c
+++ b/src/southbridge/intel/fsp_rangeley/spi.c
@@ -20,6 +20,7 @@
#include <commonlib/helpers.h>
#include <delay.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/southbridge/intel/fsp_rangeley/watchdog.c b/src/southbridge/intel/fsp_rangeley/watchdog.c
index d7d3141e59..f18af8927c 100644
--- a/src/southbridge/intel/fsp_rangeley/watchdog.c
+++ b/src/southbridge/intel/fsp_rangeley/watchdog.c
@@ -18,6 +18,7 @@
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
#include <watchdog.h>
diff --git a/src/southbridge/intel/i82371eb/bootblock.c b/src/southbridge/intel/i82371eb/bootblock.c
index 38b797d5a6..ea167b59f7 100644
--- a/src/southbridge/intel/i82371eb/bootblock.c
+++ b/src/southbridge/intel/i82371eb/bootblock.c
@@ -16,6 +16,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <device/pci_type.h>
#include "i82371eb.h"
diff --git a/src/southbridge/intel/i82371eb/early_pm.c b/src/southbridge/intel/i82371eb/early_pm.c
index 720cb0d013..2233be0fec 100644
--- a/src/southbridge/intel/i82371eb/early_pm.c
+++ b/src/southbridge/intel/i82371eb/early_pm.c
@@ -16,6 +16,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
diff --git a/src/southbridge/intel/i82371eb/early_smbus.c b/src/southbridge/intel/i82371eb/early_smbus.c
index 4e91c0aabf..b8b6dbad59 100644
--- a/src/southbridge/intel/i82371eb/early_smbus.c
+++ b/src/southbridge/intel/i82371eb/early_smbus.c
@@ -16,6 +16,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/i82371eb/ide.c b/src/southbridge/intel/i82371eb/ide.c
index e3ed178658..33f7ac7569 100644
--- a/src/southbridge/intel/i82371eb/ide.c
+++ b/src/southbridge/intel/i82371eb/ide.c
@@ -20,6 +20,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include "i82371eb.h"
diff --git a/src/southbridge/intel/i82371eb/isa.c b/src/southbridge/intel/i82371eb/isa.c
index 8030a750c8..b4041ef9e0 100644
--- a/src/southbridge/intel/i82371eb/isa.c
+++ b/src/southbridge/intel/i82371eb/isa.c
@@ -18,6 +18,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <pc80/isa-dma.h>
#include <pc80/mc146818rtc.h>
diff --git a/src/southbridge/intel/i82371eb/smbus.c b/src/southbridge/intel/i82371eb/smbus.c
index 5b95c57d8d..afc4d6ac1e 100644
--- a/src/southbridge/intel/i82371eb/smbus.c
+++ b/src/southbridge/intel/i82371eb/smbus.c
@@ -18,6 +18,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <stdint.h>
#include <device/device.h>
diff --git a/src/southbridge/intel/i82801dx/ac97.c b/src/southbridge/intel/i82801dx/ac97.c
index f9a7904408..cbbc370252 100644
--- a/src/southbridge/intel/i82801dx/ac97.c
+++ b/src/southbridge/intel/i82801dx/ac97.c
@@ -19,6 +19,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <delay.h>
#include "i82801dx.h"
diff --git a/src/southbridge/intel/i82801dx/bootblock.c b/src/southbridge/intel/i82801dx/bootblock.c
index a5e48e5ded..1601b55cd6 100644
--- a/src/southbridge/intel/i82801dx/bootblock.c
+++ b/src/southbridge/intel/i82801dx/bootblock.c
@@ -13,6 +13,7 @@
#include <cpu/intel/car/bootblock.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
void bootblock_early_southbridge_init(void)
{
diff --git a/src/southbridge/intel/i82801dx/early_smbus.c b/src/southbridge/intel/i82801dx/early_smbus.c
index fabb58b55b..83fd9a13c8 100644
--- a/src/southbridge/intel/i82801dx/early_smbus.c
+++ b/src/southbridge/intel/i82801dx/early_smbus.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <console/console.h>
#include <southbridge/intel/common/smbus.h>
diff --git a/src/southbridge/intel/i82801dx/i82801dx.c b/src/southbridge/intel/i82801dx/i82801dx.c
index f233eed395..765bcb2587 100644
--- a/src/southbridge/intel/i82801dx/i82801dx.c
+++ b/src/southbridge/intel/i82801dx/i82801dx.c
@@ -16,6 +16,7 @@
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include "i82801dx.h"
void i82801dx_enable(struct device *dev)
diff --git a/src/southbridge/intel/i82801dx/smi.c b/src/southbridge/intel/i82801dx/smi.c
index bdea66f9b3..b977e32cd2 100644
--- a/src/southbridge/intel/i82801dx/smi.c
+++ b/src/southbridge/intel/i82801dx/smi.c
@@ -20,6 +20,7 @@
#include <console/console.h>
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
#include <string.h>
diff --git a/src/southbridge/intel/i82801dx/smihandler.c b/src/southbridge/intel/i82801dx/smihandler.c
index e7a9589116..17bedabbbe 100644
--- a/src/southbridge/intel/i82801dx/smihandler.c
+++ b/src/southbridge/intel/i82801dx/smihandler.c
@@ -16,6 +16,7 @@
#include <types.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
diff --git a/src/southbridge/intel/i82801gx/ac97.c b/src/southbridge/intel/i82801gx/ac97.c
index 9bf9456729..582c962197 100644
--- a/src/southbridge/intel/i82801gx/ac97.c
+++ b/src/southbridge/intel/i82801gx/ac97.c
@@ -19,6 +19,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <delay.h>
#include "i82801gx.h"
diff --git a/src/southbridge/intel/i82801gx/bootblock.c b/src/southbridge/intel/i82801gx/bootblock.c
index 6d65df3983..991f1bda6e 100644
--- a/src/southbridge/intel/i82801gx/bootblock.c
+++ b/src/southbridge/intel/i82801gx/bootblock.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include "i82801gx.h"
static void enable_spi_prefetch(void)
diff --git a/src/southbridge/intel/i82801gx/early_smbus.c b/src/southbridge/intel/i82801gx/early_smbus.c
index 9dddcec362..e970937e88 100644
--- a/src/southbridge/intel/i82801gx/early_smbus.c
+++ b/src/southbridge/intel/i82801gx/early_smbus.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/pci_def.h>
#include <southbridge/intel/common/smbus.h>
diff --git a/src/southbridge/intel/i82801gx/i82801gx.c b/src/southbridge/intel/i82801gx/i82801gx.c
index a93d913a6d..6aab741737 100644
--- a/src/southbridge/intel/i82801gx/i82801gx.c
+++ b/src/southbridge/intel/i82801gx/i82801gx.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include "i82801gx.h"
#include "sata.h"
diff --git a/src/southbridge/intel/i82801gx/ide.c b/src/southbridge/intel/i82801gx/ide.c
index 97092726fa..e25eaae150 100644
--- a/src/southbridge/intel/i82801gx/ide.c
+++ b/src/southbridge/intel/i82801gx/ide.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include "i82801gx.h"
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c
index b71693a7c2..a08bbf8d2c 100644
--- a/src/southbridge/intel/i82801gx/lpc.c
+++ b/src/southbridge/intel/i82801gx/lpc.c
@@ -22,6 +22,7 @@
#include <pc80/isa-dma.h>
#include <pc80/i8259.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
#include "i82801gx.h"
diff --git a/src/southbridge/intel/i82801gx/pci.c b/src/southbridge/intel/i82801gx/pci.c
index 97ae98abdf..514db3cd64 100644
--- a/src/southbridge/intel/i82801gx/pci.c
+++ b/src/southbridge/intel/i82801gx/pci.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include "i82801gx.h"
diff --git a/src/southbridge/intel/i82801gx/pcie.c b/src/southbridge/intel/i82801gx/pcie.c
index c0f9c1239c..4679ee58f8 100644
--- a/src/southbridge/intel/i82801gx/pcie.c
+++ b/src/southbridge/intel/i82801gx/pcie.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include "i82801gx.h"
diff --git a/src/southbridge/intel/i82801gx/sata.c b/src/southbridge/intel/i82801gx/sata.c
index 567c1e5047..bf473f6d95 100644
--- a/src/southbridge/intel/i82801gx/sata.c
+++ b/src/southbridge/intel/i82801gx/sata.c
@@ -18,6 +18,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include "i82801gx.h"
#include "sata.h"
diff --git a/src/southbridge/intel/i82801gx/usb.c b/src/southbridge/intel/i82801gx/usb.c
index eaa2cf19cd..307b5ac622 100644
--- a/src/southbridge/intel/i82801gx/usb.c
+++ b/src/southbridge/intel/i82801gx/usb.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include "i82801gx.h"
diff --git a/src/southbridge/intel/i82801gx/usb_ehci.c b/src/southbridge/intel/i82801gx/usb_ehci.c
index b40c83d56d..9b79aff5c3 100644
--- a/src/southbridge/intel/i82801gx/usb_ehci.c
+++ b/src/southbridge/intel/i82801gx/usb_ehci.c
@@ -21,6 +21,7 @@
#include "i82801gx.h"
#include <device/pci_ehci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
static void usb_ehci_init(struct device *dev)
{
diff --git a/src/southbridge/intel/i82801gx/watchdog.c b/src/southbridge/intel/i82801gx/watchdog.c
index ff4da6412c..12284b46c1 100644
--- a/src/southbridge/intel/i82801gx/watchdog.c
+++ b/src/southbridge/intel/i82801gx/watchdog.c
@@ -16,6 +16,7 @@
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
#include <watchdog.h>
diff --git a/src/southbridge/intel/i82801ix/bootblock.c b/src/southbridge/intel/i82801ix/bootblock.c
index 6252712eba..8174623847 100644
--- a/src/southbridge/intel/i82801ix/bootblock.c
+++ b/src/southbridge/intel/i82801ix/bootblock.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
static void enable_spi_prefetch(void)
{
diff --git a/src/southbridge/intel/i82801ix/early_init.c b/src/southbridge/intel/i82801ix/early_init.c
index f7e2fd2621..da124ff54f 100644
--- a/src/southbridge/intel/i82801ix/early_init.c
+++ b/src/southbridge/intel/i82801ix/early_init.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include "i82801ix.h"
void i82801ix_early_init(void)
diff --git a/src/southbridge/intel/i82801ix/early_smbus.c b/src/southbridge/intel/i82801ix/early_smbus.c
index 0dda0c84b9..6949a309f6 100644
--- a/src/southbridge/intel/i82801ix/early_smbus.c
+++ b/src/southbridge/intel/i82801ix/early_smbus.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/pci_def.h>
#include <southbridge/intel/common/smbus.h>
diff --git a/src/southbridge/intel/i82801ix/i82801ix.c b/src/southbridge/intel/i82801ix/i82801ix.c
index f3027bf260..991ae82259 100644
--- a/src/southbridge/intel/i82801ix/i82801ix.c
+++ b/src/southbridge/intel/i82801ix/i82801ix.c
@@ -18,6 +18,7 @@
#include <stdlib.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
#include <console/console.h>
diff --git a/src/southbridge/intel/i82801ix/i82801ix.h b/src/southbridge/intel/i82801ix/i82801ix.h
index ddecc0cd71..bfa875b74d 100644
--- a/src/southbridge/intel/i82801ix/i82801ix.h
+++ b/src/southbridge/intel/i82801ix/i82801ix.h
@@ -204,6 +204,8 @@
#ifndef __ACPI__
#ifndef __ASSEMBLER__
+#include <device/pci_ops.h>
+
static inline int lpc_is_mobile(const u16 devid)
{
return (devid == 0x2917) || (devid == 0x2919);
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index f9e11140ff..db5d3a641a 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -23,6 +23,7 @@
#include <pc80/isa-dma.h>
#include <pc80/i8259.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
#include <cpu/x86/smm.h>
diff --git a/src/southbridge/intel/i82801ix/pci.c b/src/southbridge/intel/i82801ix/pci.c
index 13f92f064a..4003e740c4 100644
--- a/src/southbridge/intel/i82801ix/pci.c
+++ b/src/southbridge/intel/i82801ix/pci.c
@@ -16,6 +16,7 @@
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include "i82801ix.h"
diff --git a/src/southbridge/intel/i82801ix/pcie.c b/src/southbridge/intel/i82801ix/pcie.c
index 04eb9b938b..a36fdc617c 100644
--- a/src/southbridge/intel/i82801ix/pcie.c
+++ b/src/southbridge/intel/i82801ix/pcie.c
@@ -18,6 +18,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pciexp.h>
#include <device/pci_ids.h>
#include <southbridge/intel/common/pciehp.h>
diff --git a/src/southbridge/intel/i82801ix/sata.c b/src/southbridge/intel/i82801ix/sata.c
index e3b7e14b8c..65422c8344 100644
--- a/src/southbridge/intel/i82801ix/sata.c
+++ b/src/southbridge/intel/i82801ix/sata.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/southbridge/intel/i82801ix/smi.c b/src/southbridge/intel/i82801ix/smi.c
index 74fa495695..a9d5e7dc08 100644
--- a/src/southbridge/intel/i82801ix/smi.c
+++ b/src/southbridge/intel/i82801ix/smi.c
@@ -20,6 +20,7 @@
#include <device/pci.h>
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/acpi.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
diff --git a/src/southbridge/intel/i82801ix/thermal.c b/src/southbridge/intel/i82801ix/thermal.c
index 931198254d..325eb08aae 100644
--- a/src/southbridge/intel/i82801ix/thermal.c
+++ b/src/southbridge/intel/i82801ix/thermal.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/southbridge/intel/i82801ix/usb_ehci.c b/src/southbridge/intel/i82801ix/usb_ehci.c
index e386f825d9..8768e3e0cf 100644
--- a/src/southbridge/intel/i82801ix/usb_ehci.c
+++ b/src/southbridge/intel/i82801ix/usb_ehci.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include "i82801ix.h"
#include <device/pci_ehci.h>
diff --git a/src/southbridge/intel/i82801jx/bootblock.c b/src/southbridge/intel/i82801jx/bootblock.c
index 911361af6b..011c15c2e5 100644
--- a/src/southbridge/intel/i82801jx/bootblock.c
+++ b/src/southbridge/intel/i82801jx/bootblock.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include "i82801jx.h"
static void enable_spi_prefetch(void)
diff --git a/src/southbridge/intel/i82801jx/early_smbus.c b/src/southbridge/intel/i82801jx/early_smbus.c
index 8c870454fe..d2b87d1812 100644
--- a/src/southbridge/intel/i82801jx/early_smbus.c
+++ b/src/southbridge/intel/i82801jx/early_smbus.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/pci_def.h>
#include <southbridge/intel/common/smbus.h>
diff --git a/src/southbridge/intel/i82801jx/i82801jx.c b/src/southbridge/intel/i82801jx/i82801jx.c
index 64859f8ed1..d15f0e3556 100644
--- a/src/southbridge/intel/i82801jx/i82801jx.c
+++ b/src/southbridge/intel/i82801jx/i82801jx.c
@@ -18,6 +18,7 @@
#include <stdlib.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
#include <console/console.h>
diff --git a/src/southbridge/intel/i82801jx/i82801jx.h b/src/southbridge/intel/i82801jx/i82801jx.h
index 00148480a1..2a85d5ad23 100644
--- a/src/southbridge/intel/i82801jx/i82801jx.h
+++ b/src/southbridge/intel/i82801jx/i82801jx.h
@@ -224,6 +224,8 @@
#ifndef __ACPI__
#ifndef __ASSEMBLER__
+#include <device/pci_ops.h>
+
static inline int lpc_is_mobile(const u16 devid)
{
return (devid == 0x2917) || (devid == 0x2919);
diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c
index 6027d152ef..f157fa5f61 100644
--- a/src/southbridge/intel/i82801jx/lpc.c
+++ b/src/southbridge/intel/i82801jx/lpc.c
@@ -23,6 +23,7 @@
#include <pc80/isa-dma.h>
#include <pc80/i8259.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
#include <cpu/x86/smm.h>
diff --git a/src/southbridge/intel/i82801jx/pci.c b/src/southbridge/intel/i82801jx/pci.c
index cfafda09cc..a32d4a94b0 100644
--- a/src/southbridge/intel/i82801jx/pci.c
+++ b/src/southbridge/intel/i82801jx/pci.c
@@ -16,6 +16,7 @@
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include "i82801jx.h"
diff --git a/src/southbridge/intel/i82801jx/pcie.c b/src/southbridge/intel/i82801jx/pcie.c
index f5eaca5798..fb90cd962a 100644
--- a/src/southbridge/intel/i82801jx/pcie.c
+++ b/src/southbridge/intel/i82801jx/pcie.c
@@ -18,6 +18,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pciexp.h>
#include <device/pci_ids.h>
#include <southbridge/intel/common/pciehp.h>
diff --git a/src/southbridge/intel/i82801jx/sata.c b/src/southbridge/intel/i82801jx/sata.c
index 5978294616..bb175e6eb1 100644
--- a/src/southbridge/intel/i82801jx/sata.c
+++ b/src/southbridge/intel/i82801jx/sata.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/southbridge/intel/i82801jx/thermal.c b/src/southbridge/intel/i82801jx/thermal.c
index 4a8ba290f3..d3f0122f22 100644
--- a/src/southbridge/intel/i82801jx/thermal.c
+++ b/src/southbridge/intel/i82801jx/thermal.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/southbridge/intel/i82801jx/usb_ehci.c b/src/southbridge/intel/i82801jx/usb_ehci.c
index 0aad672fab..543ac57f01 100644
--- a/src/southbridge/intel/i82801jx/usb_ehci.c
+++ b/src/southbridge/intel/i82801jx/usb_ehci.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include "i82801jx.h"
#include <device/pci_ehci.h>
diff --git a/src/southbridge/intel/ibexpeak/early_smbus.c b/src/southbridge/intel/ibexpeak/early_smbus.c
index 8760a82435..241584bb49 100644
--- a/src/southbridge/intel/ibexpeak/early_smbus.c
+++ b/src/southbridge/intel/ibexpeak/early_smbus.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/pci_def.h>
#include <southbridge/intel/common/smbus.h>
diff --git a/src/southbridge/intel/ibexpeak/early_thermal.c b/src/southbridge/intel/ibexpeak/early_thermal.c
index 4e4860c61d..6c9f794fc2 100644
--- a/src/southbridge/intel/ibexpeak/early_thermal.c
+++ b/src/southbridge/intel/ibexpeak/early_thermal.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include "pch.h"
#include "cpu/intel/model_2065x/model_2065x.h"
#include <cpu/x86/msr.h>
diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c
index edbb57e799..7ae178ef65 100644
--- a/src/southbridge/intel/ibexpeak/lpc.c
+++ b/src/southbridge/intel/ibexpeak/lpc.c
@@ -23,6 +23,7 @@
#include <pc80/isa-dma.h>
#include <pc80/i8259.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <arch/ioapic.h>
#include <arch/acpi.h>
#include <arch/cpu.h>
diff --git a/src/southbridge/intel/ibexpeak/me.c b/src/southbridge/intel/ibexpeak/me.c
index b1ff815edb..8eafd355c0 100644
--- a/src/southbridge/intel/ibexpeak/me.c
+++ b/src/southbridge/intel/ibexpeak/me.c
@@ -24,6 +24,7 @@
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/ibexpeak/sata.c b/src/southbridge/intel/ibexpeak/sata.c
index 3833e12a70..ea666663b2 100644
--- a/src/southbridge/intel/ibexpeak/sata.c
+++ b/src/southbridge/intel/ibexpeak/sata.c
@@ -16,6 +16,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/southbridge/intel/ibexpeak/smi.c b/src/southbridge/intel/ibexpeak/smi.c
index 31736628b3..d9d021571f 100644
--- a/src/southbridge/intel/ibexpeak/smi.c
+++ b/src/southbridge/intel/ibexpeak/smi.c
@@ -20,6 +20,7 @@
#include <device/pci.h>
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
#include <string.h>
diff --git a/src/southbridge/intel/ibexpeak/smihandler.c b/src/southbridge/intel/ibexpeak/smihandler.c
index d305635398..e6e4682057 100644
--- a/src/southbridge/intel/ibexpeak/smihandler.c
+++ b/src/southbridge/intel/ibexpeak/smihandler.c
@@ -16,6 +16,7 @@
#include <types.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/ibexpeak/thermal.c b/src/southbridge/intel/ibexpeak/thermal.c
index 374cbf11dc..bafc83ba31 100644
--- a/src/southbridge/intel/ibexpeak/thermal.c
+++ b/src/southbridge/intel/ibexpeak/thermal.c
@@ -20,6 +20,7 @@
#include <device/pci_ids.h>
#include "pch.h"
#include <arch/io.h>
+#include <device/pci_ops.h>
static void thermal_init(struct device *dev)
{
diff --git a/src/southbridge/intel/ibexpeak/usb_ehci.c b/src/southbridge/intel/ibexpeak/usb_ehci.c
index 13670b8ca1..b67a96a1e2 100644
--- a/src/southbridge/intel/ibexpeak/usb_ehci.c
+++ b/src/southbridge/intel/ibexpeak/usb_ehci.c
@@ -22,6 +22,7 @@
#include "pch.h"
#include <device/pci_ehci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
static void usb_ehci_init(struct device *dev)
{
diff --git a/src/southbridge/intel/lynxpoint/bootblock.c b/src/southbridge/intel/lynxpoint/bootblock.c
index cb595cdd0c..82fe07ebdc 100644
--- a/src/southbridge/intel/lynxpoint/bootblock.c
+++ b/src/southbridge/intel/lynxpoint/bootblock.c
@@ -14,6 +14,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include "pch.h"
/*
diff --git a/src/southbridge/intel/lynxpoint/early_me.c b/src/southbridge/intel/lynxpoint/early_me.c
index e02a16c41a..b02f19580c 100644
--- a/src/southbridge/intel/lynxpoint/early_me.c
+++ b/src/southbridge/intel/lynxpoint/early_me.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <delay.h>
#include <halt.h>
diff --git a/src/southbridge/intel/lynxpoint/early_pch.c b/src/southbridge/intel/lynxpoint/early_pch.c
index 912df8ea4c..a5c69e050c 100644
--- a/src/southbridge/intel/lynxpoint/early_pch.c
+++ b/src/southbridge/intel/lynxpoint/early_pch.c
@@ -16,6 +16,7 @@
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci_def.h>
#include <elog.h>
diff --git a/src/southbridge/intel/lynxpoint/early_smbus.c b/src/southbridge/intel/lynxpoint/early_smbus.c
index 3cd98ac5e4..d3847a5018 100644
--- a/src/southbridge/intel/lynxpoint/early_smbus.c
+++ b/src/southbridge/intel/lynxpoint/early_smbus.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/pci_def.h>
#include <southbridge/intel/common/smbus.h>
diff --git a/src/southbridge/intel/lynxpoint/early_usb.c b/src/southbridge/intel/lynxpoint/early_usb.c
index 4b447161ef..c0186dbc79 100644
--- a/src/southbridge/intel/lynxpoint/early_usb.c
+++ b/src/southbridge/intel/lynxpoint/early_usb.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_def.h>
#include "pch.h"
diff --git a/src/southbridge/intel/lynxpoint/lp_gpio.c b/src/southbridge/intel/lynxpoint/lp_gpio.c
index b6edc8da1f..48e0be3aaf 100644
--- a/src/southbridge/intel/lynxpoint/lp_gpio.c
+++ b/src/southbridge/intel/lynxpoint/lp_gpio.c
@@ -16,6 +16,7 @@
#include <stdint.h>
#include <string.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/southbridge/intel/lynxpoint/me_9.x.c b/src/southbridge/intel/lynxpoint/me_9.x.c
index 1a0a68c9db..08085afb58 100644
--- a/src/southbridge/intel/lynxpoint/me_9.x.c
+++ b/src/southbridge/intel/lynxpoint/me_9.x.c
@@ -24,6 +24,7 @@
#include <arch/acpi.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/southbridge/intel/lynxpoint/pch.c b/src/southbridge/intel/lynxpoint/pch.c
index b197bbcfc4..74943c6cb7 100644
--- a/src/southbridge/intel/lynxpoint/pch.c
+++ b/src/southbridge/intel/lynxpoint/pch.c
@@ -18,6 +18,7 @@
#include <console/console.h>
#include <delay.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/lynxpoint/pci.c b/src/southbridge/intel/lynxpoint/pci.c
index 3c43210dd9..6c26bb8e40 100644
--- a/src/southbridge/intel/lynxpoint/pci.c
+++ b/src/southbridge/intel/lynxpoint/pci.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include "pch.h"
diff --git a/src/southbridge/intel/lynxpoint/sata.c b/src/southbridge/intel/lynxpoint/sata.c
index 30e8aa8732..aa18f4a59b 100644
--- a/src/southbridge/intel/lynxpoint/sata.c
+++ b/src/southbridge/intel/lynxpoint/sata.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/southbridge/intel/lynxpoint/serialio.c b/src/southbridge/intel/lynxpoint/serialio.c
index 92fa9503aa..44c9a07882 100644
--- a/src/southbridge/intel/lynxpoint/serialio.c
+++ b/src/southbridge/intel/lynxpoint/serialio.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <cbmem.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c
index fd1ba228a6..8c46ab0255 100644
--- a/src/southbridge/intel/lynxpoint/smihandler.c
+++ b/src/southbridge/intel/lynxpoint/smihandler.c
@@ -18,6 +18,7 @@
#include <delay.h>
#include <types.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/intel/lynxpoint/usb_ehci.c b/src/southbridge/intel/lynxpoint/usb_ehci.c
index 7f300d68eb..977dcfac40 100644
--- a/src/southbridge/intel/lynxpoint/usb_ehci.c
+++ b/src/southbridge/intel/lynxpoint/usb_ehci.c
@@ -21,6 +21,7 @@
#include <device/pci_ids.h>
#include <device/pci_ehci.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include "pch.h"
#ifdef __SMM__
diff --git a/src/southbridge/intel/lynxpoint/usb_xhci.c b/src/southbridge/intel/lynxpoint/usb_xhci.c
index 03341da829..490740e730 100644
--- a/src/southbridge/intel/lynxpoint/usb_xhci.c
+++ b/src/southbridge/intel/lynxpoint/usb_xhci.c
@@ -19,6 +19,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include "pch.h"
typedef struct southbridge_intel_lynxpoint_config config_t;
diff --git a/src/southbridge/intel/lynxpoint/watchdog.c b/src/southbridge/intel/lynxpoint/watchdog.c
index ec7cb5d0b5..545d3d50d5 100644
--- a/src/southbridge/intel/lynxpoint/watchdog.c
+++ b/src/southbridge/intel/lynxpoint/watchdog.c
@@ -17,6 +17,7 @@
#include <console/console.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/device.h>
#include <device/pci.h>
#include <watchdog.h>
diff --git a/src/southbridge/nvidia/ck804/bootblock.c b/src/southbridge/nvidia/ck804/bootblock.c
index 24ca0a8fab..4275472d87 100644
--- a/src/southbridge/nvidia/ck804/bootblock.c
+++ b/src/southbridge/nvidia/ck804/bootblock.c
@@ -15,6 +15,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include "ck804.h"
static void ck804_enable_rom(void)
diff --git a/src/southbridge/nvidia/ck804/early_smbus.c b/src/southbridge/nvidia/ck804/early_smbus.c
index f7bddbf674..a310422d91 100644
--- a/src/southbridge/nvidia/ck804/early_smbus.c
+++ b/src/southbridge/nvidia/ck804/early_smbus.c
@@ -16,6 +16,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/pci.h>
#include <device/pci_def.h>
diff --git a/src/southbridge/nvidia/ck804/enable_usbdebug.c b/src/southbridge/nvidia/ck804/enable_usbdebug.c
index 7296e0526d..c866138d4b 100644
--- a/src/southbridge/nvidia/ck804/enable_usbdebug.c
+++ b/src/southbridge/nvidia/ck804/enable_usbdebug.c
@@ -22,6 +22,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_ehci.h>
#include <device/pci_def.h>
#include "ck804.h"
diff --git a/src/southbridge/nvidia/mcp55/bootblock.c b/src/southbridge/nvidia/mcp55/bootblock.c
index 6d24f568da..9a04a87144 100644
--- a/src/southbridge/nvidia/mcp55/bootblock.c
+++ b/src/southbridge/nvidia/mcp55/bootblock.c
@@ -19,6 +19,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include "mcp55.h"
static void mcp55_enable_rom(void)
diff --git a/src/southbridge/nvidia/mcp55/early_smbus.c b/src/southbridge/nvidia/mcp55/early_smbus.c
index f52d079a12..fe9ccdd746 100644
--- a/src/southbridge/nvidia/mcp55/early_smbus.c
+++ b/src/southbridge/nvidia/mcp55/early_smbus.c
@@ -18,6 +18,7 @@
*/
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <console/console.h>
#include <device/pci.h>
#include "smbus.h"
diff --git a/src/southbridge/nvidia/mcp55/enable_usbdebug.c b/src/southbridge/nvidia/mcp55/enable_usbdebug.c
index 69e085984d..b4b428635d 100644
--- a/src/southbridge/nvidia/mcp55/enable_usbdebug.c
+++ b/src/southbridge/nvidia/mcp55/enable_usbdebug.c
@@ -22,6 +22,7 @@
#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_ops.h>
#include <device/pci_ehci.h>
#include <device/pci_def.h>
#include "mcp55.h"