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authorMartin Roth <martinroth@google.com>2017-05-05 15:06:23 -0600
committerMartin Roth <martinroth@google.com>2017-05-05 23:17:26 +0200
commitf52ea7fe00ebd846e8d6ee0807d614f27c01017f (patch)
treee5599baea183ec9fd95e7657a8d47fcafe8eb046 /src
parent39b633b26d6d4cf185fbbdd5a256d0665409bd5b (diff)
downloadcoreboot-f52ea7fe00ebd846e8d6ee0807d614f27c01017f.tar.xz
Revert "google/scarlet: Enable innolux,p079zca MIPI panel"
This reverts commit 39b633b26d6d4cf185fbbdd5a256d0665409bd5b. Commit was accidentally pushed too early and broke the tree. I'll repush the original. Change-Id: Iaca6d43cc8fc0959565d5d151a330c0c7ba38309 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/19596 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/gru/devicetree.scarlet.cb12
1 files changed, 1 insertions, 11 deletions
diff --git a/src/mainboard/google/gru/devicetree.scarlet.cb b/src/mainboard/google/gru/devicetree.scarlet.cb
index e5a9b318f6..2c316545f0 100644
--- a/src/mainboard/google/gru/devicetree.scarlet.cb
+++ b/src/mainboard/google/gru/devicetree.scarlet.cb
@@ -15,16 +15,6 @@
chip soc/rockchip/rk3399
device cpu_cluster 0 on end
- register "vop_mode" = "VOP_MODE_MIPI"
+ register "vop_mode" = "VOP_MODE_NONE"
register "framebuffer_bits_per_pixel" = "32"
- register "panel_pixel_clock" = "56900"
- register "panel_refresh" = "60"
- register "panel_ha" = "768"
- register "panel_hbl" = "120"
- register "panel_hso" = "40"
- register "panel_hspw" = "40"
- register "panel_va" = "1024"
- register "panel_vbl" = "44"
- register "panel_vso" = "20"
- register "panel_vspw" = "4"
end