diff options
author | Aaron Durbin <adurbin@chromium.org> | 2015-03-17 13:20:02 -0500 |
---|---|---|
committer | Aaron Durbin <adurbin@google.com> | 2015-03-20 19:28:52 +0100 |
commit | f5d7f605aba97451f3116cf6489c0e31b5554427 (patch) | |
tree | 760c54276be0be592ef0456ccd874ed179402322 /src | |
parent | e4f3e7a9c656356a92e827d5a39b85106cbdaf3a (diff) | |
download | coreboot-f5d7f605aba97451f3116cf6489c0e31b5554427.tar.xz |
bootblocks: use run_romstage()
Instead of sprinkling the cbfs calls around (as well as getting
return values incorrect) use the common run_romstage() to perform
the necessary work to load and run romstage.
Change-Id: Id59f47febf5122cb3ee60f9741cfb58cb60ccab5
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/8711
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r-- | src/arch/arm/armv4/bootblock_simple.c | 10 | ||||
-rw-r--r-- | src/arch/arm/armv7/bootblock_simple.c | 10 | ||||
-rw-r--r-- | src/arch/arm64/armv8/bootblock_simple.c | 12 | ||||
-rw-r--r-- | src/arch/riscv/bootblock_simple.c | 11 | ||||
-rw-r--r-- | src/mainboard/emulation/qemu-riscv/bootblock.c | 14 | ||||
-rw-r--r-- | src/soc/nvidia/tegra132/bootblock.c | 17 |
6 files changed, 12 insertions, 62 deletions
diff --git a/src/arch/arm/armv4/bootblock_simple.c b/src/arch/arm/armv4/bootblock_simple.c index 15b6bdec9a..9e399a9b7c 100644 --- a/src/arch/arm/armv4/bootblock_simple.c +++ b/src/arch/arm/armv4/bootblock_simple.c @@ -24,16 +24,13 @@ #include <bootblock_common.h> #include <cbfs.h> #include <console/console.h> -#include <halt.h> +#include <program_loading.h> __attribute__((weak)) void bootblock_soc_init(void) { /* do nothing */ } __attribute__((weak)) void bootblock_mainboard_init(void) { /* do nothing */ } void main(void) { - const char *stage_name = "fallback/romstage"; - void *entry; - bootblock_soc_init(); bootblock_mainboard_init(); @@ -42,8 +39,5 @@ void main(void) exception_init(); } - entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, stage_name); - - if (entry) stage_exit(entry); - halt(); + run_romstage(); } diff --git a/src/arch/arm/armv7/bootblock_simple.c b/src/arch/arm/armv7/bootblock_simple.c index 2fc000d746..96f2445f57 100644 --- a/src/arch/arm/armv7/bootblock_simple.c +++ b/src/arch/arm/armv7/bootblock_simple.c @@ -25,7 +25,7 @@ #include <bootblock_common.h> #include <cbfs.h> #include <console/console.h> -#include <halt.h> +#include <program_loading.h> #include <smp/node.h> __attribute__((weak)) void bootblock_soc_init(void) { /* do nothing */ } @@ -33,9 +33,6 @@ __attribute__((weak)) void bootblock_mainboard_init(void) { /* do nothing */ } void main(void) { - const char *stage_name = "fallback/romstage"; - void *entry; - bootblock_soc_init(); bootblock_mainboard_init(); @@ -44,8 +41,5 @@ void main(void) exception_init(); #endif - entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, stage_name); - - if (entry) stage_exit(entry); - halt(); + run_romstage(); } diff --git a/src/arch/arm64/armv8/bootblock_simple.c b/src/arch/arm64/armv8/bootblock_simple.c index 7948f2f717..ce64a4cd63 100644 --- a/src/arch/arm64/armv8/bootblock_simple.c +++ b/src/arch/arm64/armv8/bootblock_simple.c @@ -25,7 +25,7 @@ #include <arch/exception.h> #include <cbfs.h> #include <console/console.h> -#include <halt.h> +#include <program_loading.h> static int boot_cpu(void) { @@ -39,9 +39,6 @@ static int boot_cpu(void) void main(void) { - const char *stage_name = CONFIG_CBFS_PREFIX"/romstage"; - void *entry = NULL; - /* Globally disable MMU, caches, and branch prediction (these should * be disabled by default on reset) */ dcache_mmu_disable(); @@ -64,10 +61,5 @@ void main(void) exception_init(); #endif - entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, stage_name); - - printk(BIOS_SPEW, "stage_name %s, entry %p\n", stage_name, entry); - - if (entry) stage_exit(entry); - halt(); + run_romstage(); } diff --git a/src/arch/riscv/bootblock_simple.c b/src/arch/riscv/bootblock_simple.c index d8339d1f76..6cde4ec93f 100644 --- a/src/arch/riscv/bootblock_simple.c +++ b/src/arch/riscv/bootblock_simple.c @@ -26,6 +26,7 @@ #include <arch/exception.h> #include <cbfs.h> #include <console/console.h> +#include <program_loading.h> static int boot_cpu(void) { @@ -39,9 +40,6 @@ static int boot_cpu(void) void main(void) { - const char *stage_name = CONFIG_CBFS_PREFIX"/romstage"; - void *entry = NULL; - /* Globally disable MMU, caches, and branch prediction (these should * be disabled by default on reset) */ dcache_mmu_disable(); @@ -64,10 +62,5 @@ void main(void) exception_init(); #endif - entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, stage_name); - - printk(BIOS_SPEW, "stage_name %s, entry %p\n", stage_name, entry); - - if (entry) stage_exit(entry); - hlt(); + run_romstage(); } diff --git a/src/mainboard/emulation/qemu-riscv/bootblock.c b/src/mainboard/emulation/qemu-riscv/bootblock.c index 831b193a6e..7282a4e787 100644 --- a/src/mainboard/emulation/qemu-riscv/bootblock.c +++ b/src/mainboard/emulation/qemu-riscv/bootblock.c @@ -18,28 +18,18 @@ */ #include <arch/exception.h> -#include <arch/hlt.h> #include <bootblock_common.h> -#include <cbfs.h> #include <console/console.h> -#include <arch/stages.h> +#include <program_loading.h> // the qemu part of all this is very, very non-hardware like. // so it gets its own bootblock. void main(void) { - void *entry; - if (IS_ENABLED(CONFIG_BOOTBLOCK_CONSOLE)) { console_init(); exception_init(); } - entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, CONFIG_CBFS_PREFIX"/romstage"); - if (! entry) { - printk(BIOS_EMERG, "AAAAAAAAAAAAAA no romstage!\n"); - while (1); - } - - stage_exit(entry); + run_romstage(); } diff --git a/src/soc/nvidia/tegra132/bootblock.c b/src/soc/nvidia/tegra132/bootblock.c index ad78f51f16..5a6050a2b9 100644 --- a/src/soc/nvidia/tegra132/bootblock.c +++ b/src/soc/nvidia/tegra132/bootblock.c @@ -20,19 +20,16 @@ #include <arch/exception.h> #include <arch/hlt.h> #include <bootblock_common.h> -#include <cbfs.h> #include <console/console.h> +#include <program_loading.h> #include <soc/clock.h> #include <soc/nvidia/tegra/apbmisc.h> -#include <arch/stages.h> #include "pinmux.h" #include "power.h" void main(void) { - void *entry; - // enable pinmux clamp inputs clamp_tristate_inputs(); @@ -68,15 +65,5 @@ void main(void) printk(BIOS_INFO, "T132 bootblock: Mainboard bootblock init done\n"); - entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, - CONFIG_CBFS_PREFIX "/romstage"); - - if (entry) { - printk(BIOS_INFO, "T132 bootblock: jumping to romstage\n"); - stage_exit(entry); - } else { - printk(BIOS_INFO, "T132 bootblock: fallback/romstage not found\n"); - } - - hlt(); + run_romstage(); } |