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| author | Angel Pons <th3fanbus@gmail.com> | 2020-07-07 16:19:12 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-08 22:08:37 +0000 |
| commit | f67bf49ead50ca07e6483b8b209ee1ab1bfa1e7e (patch) | |
| tree | 6d67e8ab1a1707495a22ac92785e763e911d58de /src | |
| parent | 837141fa56344e41087ae3f525701b98ca9fed96 (diff) | |
| download | coreboot-f67bf49ead50ca07e6483b8b209ee1ab1bfa1e7e.tar.xz | |
nb/intel/i945: Use ASL 2.0 syntax
Tested with BUILD_TIMELESS=1, Getac P470 remains identical.
Change-Id: Ibf6904246ee47dffdb5fa2e24cc7a230f439c7e7
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43178
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/northbridge/intel/i945/acpi/hostbridge.asl | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/i945/acpi/hostbridge.asl b/src/northbridge/intel/i945/acpi/hostbridge.asl index 018e5edb9e..6eba41547e 100644 --- a/src/northbridge/intel/i945/acpi/hostbridge.asl +++ b/src/northbridge/intel/i945/acpi/hostbridge.asl @@ -208,8 +208,8 @@ Method (_CRS, 0, Serialized) * Enter actual TOLUD. The TOLUD register contains bits 27-31 of * the top of memory address. */ - ShiftLeft (^MCHC.TLUD, 27, PMIN) - Add(Subtract(PMAX, PMIN), 1, PLEN) + PMIN = ^MCHC.TLUD << 27 + PLEN = PMAX - PMIN + 1 Return (MCRS) } |