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authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-06-29 05:46:17 +0300
committerPatrick Georgi <pgeorgi@google.com>2020-07-08 07:33:00 +0000
commitfca0cba6a15176002bbeadd4e41a7634928481de (patch)
treeba24a06860f97e394c2581b259f241ca3321872d /src
parente769bcee9a73ac712748fb55c38d072b39bbcd88 (diff)
downloadcoreboot-fca0cba6a15176002bbeadd4e41a7634928481de.tar.xz
sb/intel/i82801gx,ix,jx: Drop invalid GNVS update routine
The smm_setup_structures() calls placed GNVS address into register %ebx. Old code on i82801dx used these low memory addresses. Change-Id: I407b9b9fd44db027a62356e2470f6c39ed3bff49 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42426 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/southbridge/intel/i82801gx/smihandler.c8
-rw-r--r--src/southbridge/intel/i82801ix/smihandler.c13
-rw-r--r--src/southbridge/intel/i82801jx/smihandler.c13
3 files changed, 9 insertions, 25 deletions
diff --git a/src/southbridge/intel/i82801gx/smihandler.c b/src/southbridge/intel/i82801gx/smihandler.c
index 7aee63b457..562dae3a97 100644
--- a/src/southbridge/intel/i82801gx/smihandler.c
+++ b/src/southbridge/intel/i82801gx/smihandler.c
@@ -21,11 +21,9 @@
u16 pmbase = DEFAULT_PMBASE;
u8 smm_initialized = 0;
-void southbridge_update_gnvs(u8 apm_cnt, int *smm_done)
-{
- gnvs = *(struct global_nvs **)0x500;
- *smm_done = 1;
-}
+/* This implementation was removed since it was invalid. There will be one shared
+ approach to set GNVS pointer into SMM without the 0xEA PM Trap mentioned above. */
+void southbridge_update_gnvs(u8 apm_cnt, int *smm_done) { }
int southbridge_io_trap_handler(int smif)
{
diff --git a/src/southbridge/intel/i82801ix/smihandler.c b/src/southbridge/intel/i82801ix/smihandler.c
index c352e5d76c..699f51f712 100644
--- a/src/southbridge/intel/i82801ix/smihandler.c
+++ b/src/southbridge/intel/i82801ix/smihandler.c
@@ -14,8 +14,9 @@
struct global_nvs *gnvs;
#endif
-void *tcg = (void *)0x0;
-void *smi1 = (void *)0x0;
+/* This implementation was removed since it was invalid. There will be one shared
+ approach to set GNVS pointer into SMM without the 0xEA PM Trap mentioned above. */
+void southbridge_update_gnvs(u8 apm_cnt, int *smm_done) { }
int southbridge_io_trap_handler(int smif)
{
@@ -34,14 +35,6 @@ int southbridge_io_trap_handler(int smif)
return 0;
}
-void southbridge_update_gnvs(u8 apm_cnt, int *smm_done)
-{
- gnvs = *(struct global_nvs **)0x500;
- tcg = *(void **)0x504;
- smi1 = *(void **)0x508;
- *smm_done = 1;
-}
-
void southbridge_smi_monitor(void)
{
#define IOTRAP(x) (trap_sts & (1 << x))
diff --git a/src/southbridge/intel/i82801jx/smihandler.c b/src/southbridge/intel/i82801jx/smihandler.c
index b6161e9d81..16ec025c15 100644
--- a/src/southbridge/intel/i82801jx/smihandler.c
+++ b/src/southbridge/intel/i82801jx/smihandler.c
@@ -15,8 +15,9 @@
u16 pmbase = DEFAULT_PMBASE;
u8 smm_initialized = 0;
-void *tcg = (void *)0x0;
-void *smi1 = (void *)0x0;
+/* This implementation was removed since it was invalid. There will be one shared
+ approach to set GNVS pointer into SMM without the 0xEA PM Trap mentioned above. */
+void southbridge_update_gnvs(u8 apm_cnt, int *smm_done) { }
int southbridge_io_trap_handler(int smif)
{
@@ -35,14 +36,6 @@ int southbridge_io_trap_handler(int smif)
return 0;
}
-void southbridge_update_gnvs(u8 apm_cnt, int *smm_done)
-{
- gnvs = *(struct global_nvs **)0x500;
- tcg = *(void **)0x504;
- smi1 = *(void **)0x508;
- *smm_done = 1;
-}
-
void southbridge_smi_monitor(void)
{
#define IOTRAP(x) (trap_sts & (1 << x))