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authorAngel Pons <th3fanbus@gmail.com>2020-03-06 18:10:02 +0100
committerFelix Held <felix-coreboot@felixheld.de>2020-03-07 16:44:25 +0000
commitfd2d4730c66386e99e5beaa853055a5e92088dab (patch)
tree20d936c5d07b450d73908629572a0f6e3510258e /src
parent69dd524993a2f7ab2e31149934b4af7da582c93a (diff)
downloadcoreboot-fd2d4730c66386e99e5beaa853055a5e92088dab.tar.xz
lib/spd_bin: Fix grammar mistake in a comment
Change-Id: I0a9ec0f9605282cbf4fd0ac05070278a3331b6fa Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39361 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src')
-rw-r--r--src/lib/spd_bin.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/lib/spd_bin.c b/src/lib/spd_bin.c
index 9e625b5228..25eb552748 100644
--- a/src/lib/spd_bin.c
+++ b/src/lib/spd_bin.c
@@ -55,7 +55,7 @@ static int spd_get_banks(const uint8_t spd[], int dram_type)
static const int ddr4_banks[10] = { 4, 8, -1, -1, 8, 16, -1, -1, 16, 32 };
int index = (spd[SPD_DENSITY_BANKS] >> 4) & 0xf;
switch (dram_type) {
- /* DDR3 and LPDDR3 has the same bank definition */
+ /* DDR3 and LPDDR3 have the same bank definition */
case SPD_DRAM_DDR3:
case SPD_DRAM_LPDDR3_INTEL:
case SPD_DRAM_LPDDR3_JEDEC: