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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-03 21:28:40 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-07 05:42:15 +0000
commitfe481eb3e5e8e8d39d892bfcfe085bc7d49ff886 (patch)
treeb0e0c39376de50d41f3d6e21ed4b3aa47262d897 /src
parente119d86ca87937d45e67d00da722c28ac7ceaa9e (diff)
downloadcoreboot-fe481eb3e5e8e8d39d892bfcfe085bc7d49ff886.tar.xz
northbridge/intel: Rename ram_calc.c to memmap.c
Use a name consistent with the more recent soc/intel. Change-Id: Ie69583f28f384eb49517203e1c3867f27e6272de Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34699 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src')
-rw-r--r--src/northbridge/intel/gm45/Makefile.inc6
-rw-r--r--src/northbridge/intel/gm45/memmap.c (renamed from src/northbridge/intel/gm45/ram_calc.c)0
-rw-r--r--src/northbridge/intel/haswell/Makefile.inc6
-rw-r--r--src/northbridge/intel/haswell/memmap.c (renamed from src/northbridge/intel/haswell/ram_calc.c)0
-rw-r--r--src/northbridge/intel/i440bx/Makefile.inc6
-rw-r--r--src/northbridge/intel/i440bx/memmap.c (renamed from src/northbridge/intel/i440bx/ram_calc.c)0
-rw-r--r--src/northbridge/intel/i945/Makefile.inc6
-rw-r--r--src/northbridge/intel/i945/memmap.c (renamed from src/northbridge/intel/i945/ram_calc.c)0
-rw-r--r--src/northbridge/intel/nehalem/Makefile.inc6
-rw-r--r--src/northbridge/intel/nehalem/memmap.c (renamed from src/northbridge/intel/nehalem/ram_calc.c)0
-rw-r--r--src/northbridge/intel/pineview/Makefile.inc6
-rw-r--r--src/northbridge/intel/pineview/memmap.c (renamed from src/northbridge/intel/pineview/ram_calc.c)0
-rw-r--r--src/northbridge/intel/sandybridge/Makefile.inc6
-rw-r--r--src/northbridge/intel/sandybridge/memmap.c (renamed from src/northbridge/intel/sandybridge/ram_calc.c)0
-rw-r--r--src/northbridge/intel/x4x/Makefile.inc6
-rw-r--r--src/northbridge/intel/x4x/memmap.c (renamed from src/northbridge/intel/x4x/ram_calc.c)0
16 files changed, 24 insertions, 24 deletions
diff --git a/src/northbridge/intel/gm45/Makefile.inc b/src/northbridge/intel/gm45/Makefile.inc
index b59a7c3cd2..0ab1c94a27 100644
--- a/src/northbridge/intel/gm45/Makefile.inc
+++ b/src/northbridge/intel/gm45/Makefile.inc
@@ -25,18 +25,18 @@ romstage-y += pcie.c
romstage-y += thermal.c
romstage-y += igd.c
romstage-y += pm.c
-romstage-y += ram_calc.c
+romstage-y += memmap.c
romstage-y += iommu.c
romstage-y += romstage.c
ramstage-y += acpi.c
-ramstage-y += ram_calc.c
+ramstage-y += memmap.c
ramstage-y += northbridge.c
ramstage-y += gma.c
smm-y += ../../../cpu/x86/lapic/apic_timer.c
-postcar-y += ram_calc.c
+postcar-y += memmap.c
endif
diff --git a/src/northbridge/intel/gm45/ram_calc.c b/src/northbridge/intel/gm45/memmap.c
index 6795f7a61f..6795f7a61f 100644
--- a/src/northbridge/intel/gm45/ram_calc.c
+++ b/src/northbridge/intel/gm45/memmap.c
diff --git a/src/northbridge/intel/haswell/Makefile.inc b/src/northbridge/intel/haswell/Makefile.inc
index ca1c04fa13..b9863367c9 100644
--- a/src/northbridge/intel/haswell/Makefile.inc
+++ b/src/northbridge/intel/haswell/Makefile.inc
@@ -17,14 +17,14 @@ ifeq ($(CONFIG_NORTHBRIDGE_INTEL_HASWELL),y)
bootblock-y += bootblock.c
-ramstage-y += ram_calc.c
+ramstage-y += memmap.c
ramstage-y += northbridge.c
ramstage-y += gma.c
ramstage-y += acpi.c
ramstage-y += minihd.c
-romstage-y += ram_calc.c
+romstage-y += memmap.c
romstage-y += raminit.c
romstage-y += early_init.c
romstage-y += report_platform.c
@@ -37,6 +37,6 @@ mrc.bin-file := $(call strip_quotes,$(CONFIG_MRC_FILE))
mrc.bin-position := 0xfffa0000
mrc.bin-type := mrc
-postcar-y += ram_calc.c
+postcar-y += memmap.c
endif
diff --git a/src/northbridge/intel/haswell/ram_calc.c b/src/northbridge/intel/haswell/memmap.c
index 3a63afcde6..3a63afcde6 100644
--- a/src/northbridge/intel/haswell/ram_calc.c
+++ b/src/northbridge/intel/haswell/memmap.c
diff --git a/src/northbridge/intel/i440bx/Makefile.inc b/src/northbridge/intel/i440bx/Makefile.inc
index d41f65d755..2c503c63c1 100644
--- a/src/northbridge/intel/i440bx/Makefile.inc
+++ b/src/northbridge/intel/i440bx/Makefile.inc
@@ -17,12 +17,12 @@
ifeq ($(CONFIG_NORTHBRIDGE_INTEL_I440BX),y)
ramstage-y += northbridge.c
-ramstage-y += ram_calc.c
+ramstage-y += memmap.c
romstage-y += raminit.c
romstage-$(CONFIG_DEBUG_RAM_SETUP) += debug.c
-romstage-y += ram_calc.c
+romstage-y += memmap.c
-postcar-y += ram_calc.c
+postcar-y += memmap.c
endif
diff --git a/src/northbridge/intel/i440bx/ram_calc.c b/src/northbridge/intel/i440bx/memmap.c
index 495ca8682a..495ca8682a 100644
--- a/src/northbridge/intel/i440bx/ram_calc.c
+++ b/src/northbridge/intel/i440bx/memmap.c
diff --git a/src/northbridge/intel/i945/Makefile.inc b/src/northbridge/intel/i945/Makefile.inc
index ffeabdc678..47b4c5166b 100644
--- a/src/northbridge/intel/i945/Makefile.inc
+++ b/src/northbridge/intel/i945/Makefile.inc
@@ -15,12 +15,12 @@
ifeq ($(CONFIG_NORTHBRIDGE_INTEL_I945),y)
-ramstage-y += ram_calc.c
+ramstage-y += memmap.c
ramstage-y += northbridge.c
ramstage-y += gma.c
ramstage-y += acpi.c
-romstage-y += ram_calc.c
+romstage-y += memmap.c
romstage-y += raminit.c
romstage-y += early_init.c
romstage-y += errata.c
@@ -29,6 +29,6 @@ romstage-y += rcven.c
smm-y += udelay.c
-postcar-y += ram_calc.c
+postcar-y += memmap.c
endif
diff --git a/src/northbridge/intel/i945/ram_calc.c b/src/northbridge/intel/i945/memmap.c
index ac1499e0fc..ac1499e0fc 100644
--- a/src/northbridge/intel/i945/ram_calc.c
+++ b/src/northbridge/intel/i945/memmap.c
diff --git a/src/northbridge/intel/nehalem/Makefile.inc b/src/northbridge/intel/nehalem/Makefile.inc
index c0d46c9a0c..52374acee8 100644
--- a/src/northbridge/intel/nehalem/Makefile.inc
+++ b/src/northbridge/intel/nehalem/Makefile.inc
@@ -15,20 +15,20 @@
ifeq ($(CONFIG_NORTHBRIDGE_INTEL_NEHALEM),y)
-ramstage-y += ram_calc.c
+ramstage-y += memmap.c
ramstage-y += northbridge.c
ramstage-y += smi.c
ramstage-y += gma.c
ramstage-y += acpi.c
-romstage-y += ram_calc.c
+romstage-y += memmap.c
romstage-y += raminit.c
romstage-y += early_init.c
romstage-y += ../../../arch/x86/walkcbfs.S
smm-y += finalize.c
-postcar-y += ram_calc.c
+postcar-y += memmap.c
endif
diff --git a/src/northbridge/intel/nehalem/ram_calc.c b/src/northbridge/intel/nehalem/memmap.c
index ec036c9d7c..ec036c9d7c 100644
--- a/src/northbridge/intel/nehalem/ram_calc.c
+++ b/src/northbridge/intel/nehalem/memmap.c
diff --git a/src/northbridge/intel/pineview/Makefile.inc b/src/northbridge/intel/pineview/Makefile.inc
index 83487717df..81ee783304 100644
--- a/src/northbridge/intel/pineview/Makefile.inc
+++ b/src/northbridge/intel/pineview/Makefile.inc
@@ -19,16 +19,16 @@ ifeq ($(CONFIG_NORTHBRIDGE_INTEL_PINEVIEW),y)
bootblock-y += ../../../cpu/x86/early_reset.S
bootblock-y += bootblock.c
-ramstage-y += ram_calc.c
+ramstage-y += memmap.c
ramstage-y += northbridge.c
ramstage-y += gma.c
ramstage-y += acpi.c
romstage-y += romstage.c
-romstage-y += ram_calc.c
+romstage-y += memmap.c
romstage-y += raminit.c
romstage-y += early_init.c
-postcar-y += ram_calc.c
+postcar-y += memmap.c
endif
diff --git a/src/northbridge/intel/pineview/ram_calc.c b/src/northbridge/intel/pineview/memmap.c
index 2f3ff6e921..2f3ff6e921 100644
--- a/src/northbridge/intel/pineview/ram_calc.c
+++ b/src/northbridge/intel/pineview/memmap.c
diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc
index 8a0b67b2c9..77d1fdbb84 100644
--- a/src/northbridge/intel/sandybridge/Makefile.inc
+++ b/src/northbridge/intel/sandybridge/Makefile.inc
@@ -15,14 +15,14 @@
ifeq ($(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE),y)
-ramstage-y += ram_calc.c
+ramstage-y += memmap.c
ramstage-y += northbridge.c
ramstage-y += pcie.c
ramstage-y += gma.c
ramstage-y += acpi.c
-romstage-y += ram_calc.c
+romstage-y += memmap.c
ramstage-y += common.c
romstage-y += common.c
@@ -48,6 +48,6 @@ romstage-y += ../../../arch/x86/walkcbfs.S
smm-y += finalize.c
-postcar-y += ram_calc.c
+postcar-y += memmap.c
endif
diff --git a/src/northbridge/intel/sandybridge/ram_calc.c b/src/northbridge/intel/sandybridge/memmap.c
index 7d5c173829..7d5c173829 100644
--- a/src/northbridge/intel/sandybridge/ram_calc.c
+++ b/src/northbridge/intel/sandybridge/memmap.c
diff --git a/src/northbridge/intel/x4x/Makefile.inc b/src/northbridge/intel/x4x/Makefile.inc
index 3118b0980e..b7fd2fe7ae 100644
--- a/src/northbridge/intel/x4x/Makefile.inc
+++ b/src/northbridge/intel/x4x/Makefile.inc
@@ -19,16 +19,16 @@ ifeq ($(CONFIG_NORTHBRIDGE_INTEL_X4X),y)
romstage-y += early_init.c
romstage-y += raminit.c
romstage-y += raminit_ddr23.c
-romstage-y += ram_calc.c
+romstage-y += memmap.c
romstage-y += rcven.c
romstage-y += raminit_tables.c
romstage-y += dq_dqs.c
ramstage-y += acpi.c
-ramstage-y += ram_calc.c
+ramstage-y += memmap.c
ramstage-y += gma.c
ramstage-y += northbridge.c
-postcar-y += ram_calc.c
+postcar-y += memmap.c
endif
diff --git a/src/northbridge/intel/x4x/ram_calc.c b/src/northbridge/intel/x4x/memmap.c
index dda838760d..dda838760d 100644
--- a/src/northbridge/intel/x4x/ram_calc.c
+++ b/src/northbridge/intel/x4x/memmap.c