summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorStefan Reinauer <stepan@coresystems.de>2010-02-04 01:32:43 +0000
committerStefan Reinauer <stepan@openbios.org>2010-02-04 01:32:43 +0000
commit04d74b1fdd52acfa5d31fa3c5317dd562feac5fa (patch)
tree4556478d84f6fba25b424ab9b604a93194efb286 /src
parent52da560bf653748a468a9062a8d76bbc1e8672b2 (diff)
downloadcoreboot-04d74b1fdd52acfa5d31fa3c5317dd562feac5fa.tar.xz
Move CAR settings for all GX1, GX2, LX and Intel Slot2 boards to the CPU.
This automatically adds the settings for those boards that didn't have settings at all yet. Also, small fixup to compareboard. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> --> Please help porting all boards from newconfig to Kconfig <-- This is a lot of janitor work and we can use your helping hands. The sooner we can get rid of Kbuild, the better. The KBuild report on the mailing list shows the config differences between newconfig and Kconfig. In theory, all Kconfig configs should be equal to their newconfig pendant. In practice it's better to come close but stay clean. --> Please help porting all boards from newconfig to Kconfig <-- git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5082 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r--src/cpu/amd/model_gx1/Kconfig10
-rw-r--r--src/cpu/amd/model_gx2/Kconfig30
-rw-r--r--src/cpu/amd/model_lx/Kconfig10
-rw-r--r--src/cpu/intel/slot_2/Kconfig10
-rw-r--r--src/mainboard/amd/db800/Kconfig10
-rw-r--r--src/mainboard/amd/norwich/Kconfig10
-rw-r--r--src/mainboard/artecgroup/dbe61/Kconfig10
-rw-r--r--src/mainboard/digitallogic/msm800sev/Kconfig10
-rw-r--r--src/mainboard/iei/pcisa-lx-800-r10/Kconfig10
-rw-r--r--src/mainboard/lippert/roadrunner-lx/Kconfig10
-rw-r--r--src/mainboard/lippert/spacerunner-lx/Kconfig10
-rw-r--r--src/mainboard/pcengines/alix1c/Kconfig10
12 files changed, 60 insertions, 80 deletions
diff --git a/src/cpu/amd/model_gx1/Kconfig b/src/cpu/amd/model_gx1/Kconfig
index 153913088d..e99fb73caa 100644
--- a/src/cpu/amd/model_gx1/Kconfig
+++ b/src/cpu/amd/model_gx1/Kconfig
@@ -21,3 +21,13 @@
config CPU_AMD_GX1
bool
+config DCACHE_RAM_BASE
+ hex
+ default 0xc0000
+ depends on CPU_AMD_GX1
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x01000
+ depends on CPU_AMD_GX1
+
diff --git a/src/cpu/amd/model_gx2/Kconfig b/src/cpu/amd/model_gx2/Kconfig
index 604edb5e6b..f4fa709a99 100644
--- a/src/cpu/amd/model_gx2/Kconfig
+++ b/src/cpu/amd/model_gx2/Kconfig
@@ -1,2 +1,32 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2010 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
config CPU_AMD_GX2
bool
+
+config DCACHE_RAM_BASE
+ hex
+ default 0xc0000
+ depends on CPU_AMD_GX2
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x01000
+ depends on CPU_AMD_GX2
+
diff --git a/src/cpu/amd/model_lx/Kconfig b/src/cpu/amd/model_lx/Kconfig
index 2d32e00f77..4bcf31bc57 100644
--- a/src/cpu/amd/model_lx/Kconfig
+++ b/src/cpu/amd/model_lx/Kconfig
@@ -1,3 +1,13 @@
config CPU_AMD_LX
bool
+config DCACHE_RAM_BASE
+ hex
+ default 0xc8000
+ depends on CPU_AMD_LX
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x8000
+ depends on CPU_AMD_LX
+
diff --git a/src/cpu/intel/slot_2/Kconfig b/src/cpu/intel/slot_2/Kconfig
index 203c0fc31c..e87adb6247 100644
--- a/src/cpu/intel/slot_2/Kconfig
+++ b/src/cpu/intel/slot_2/Kconfig
@@ -21,3 +21,13 @@
config CPU_INTEL_SLOT_2
bool
+config DCACHE_RAM_BASE
+ hex
+ default 0xc0000
+ depends on CPU_INTEL_SLOT_2
+
+config DCACHE_RAM_SIZE
+ hex
+ default 0x01000
+ depends on CPU_INTEL_SLOT2
+
diff --git a/src/mainboard/amd/db800/Kconfig b/src/mainboard/amd/db800/Kconfig
index 6456d4f8fc..95cd0e7b97 100644
--- a/src/mainboard/amd/db800/Kconfig
+++ b/src/mainboard/amd/db800/Kconfig
@@ -32,16 +32,6 @@ config IRQ_SLOT_COUNT
default 4
depends on BOARD_AMD_DB800
-config DCACHE_RAM_BASE
- hex
- default 0xc8000
- depends on BOARD_AMD_DB800
-
-config DCACHE_RAM_SIZE
- hex
- default 0x8000
- depends on BOARD_AMD_DB800
-
config RAMBASE
hex
default 0x4000
diff --git a/src/mainboard/amd/norwich/Kconfig b/src/mainboard/amd/norwich/Kconfig
index 1c67a9ae51..007d8502d2 100644
--- a/src/mainboard/amd/norwich/Kconfig
+++ b/src/mainboard/amd/norwich/Kconfig
@@ -31,16 +31,6 @@ config IRQ_SLOT_COUNT
default 6
depends on BOARD_AMD_NORWICH
-config DCACHE_RAM_BASE
- hex
- default 0xc8000
- depends on BOARD_AMD_NORWICH
-
-config DCACHE_RAM_SIZE
- hex
- default 0x8000
- depends on BOARD_AMD_NORWICH
-
config RAMBASE
hex
default 0x4000
diff --git a/src/mainboard/artecgroup/dbe61/Kconfig b/src/mainboard/artecgroup/dbe61/Kconfig
index 1d63305221..62470f479c 100644
--- a/src/mainboard/artecgroup/dbe61/Kconfig
+++ b/src/mainboard/artecgroup/dbe61/Kconfig
@@ -31,16 +31,6 @@ config IRQ_SLOT_COUNT
default 3
depends on BOARD_ARTECGROUP_DBE61
-config DCACHE_RAM_BASE
- hex
- default 0xc8000
- depends on BOARD_ARTECGROUP_DBE61
-
-config DCACHE_RAM_SIZE
- hex
- default 0x8000
- depends on BOARD_ARTECGROUP_DBE61
-
config RAMBASE
hex
default 0x4000
diff --git a/src/mainboard/digitallogic/msm800sev/Kconfig b/src/mainboard/digitallogic/msm800sev/Kconfig
index 17e64318fb..06ac45645f 100644
--- a/src/mainboard/digitallogic/msm800sev/Kconfig
+++ b/src/mainboard/digitallogic/msm800sev/Kconfig
@@ -32,16 +32,6 @@ config IRQ_SLOT_COUNT
default 9
depends on BOARD_DIGITALLOGIC_MSM800SEV
-config DCACHE_RAM_BASE
- hex
- default 0xc8000
- depends on BOARD_DIGITALLOGIC_MSM800SEV
-
-config DCACHE_RAM_SIZE
- hex
- default 0x8000
- depends on BOARD_DIGITALLOGIC_MSM800SEV
-
config RAMBASE
hex
default 0x4000
diff --git a/src/mainboard/iei/pcisa-lx-800-r10/Kconfig b/src/mainboard/iei/pcisa-lx-800-r10/Kconfig
index 5d0c4972ba..5180b84cf1 100644
--- a/src/mainboard/iei/pcisa-lx-800-r10/Kconfig
+++ b/src/mainboard/iei/pcisa-lx-800-r10/Kconfig
@@ -31,16 +31,6 @@ config IRQ_SLOT_COUNT
default 9
depends on BOARD_IEI_PCISA_LX_800_R10
-config DCACHE_RAM_BASE
- hex
- default 0xc8000
- depends on BOARD_IEI_PCISA_LX_800_R10
-
-config DCACHE_RAM_SIZE
- hex
- default 0x8000
- depends on BOARD_IEI_PCISA_LX_800_R10
-
config RAMBASE
hex
default 0x4000
diff --git a/src/mainboard/lippert/roadrunner-lx/Kconfig b/src/mainboard/lippert/roadrunner-lx/Kconfig
index 73568480e4..ddd73db8e5 100644
--- a/src/mainboard/lippert/roadrunner-lx/Kconfig
+++ b/src/mainboard/lippert/roadrunner-lx/Kconfig
@@ -32,16 +32,6 @@ config IRQ_SLOT_COUNT
default 7
depends on BOARD_LIPPERT_ROADRUNNER_LX
-config DCACHE_RAM_BASE
- hex
- default 0xc8000
- depends on BOARD_LIPPERT_ROADRUNNER_LX
-
-config DCACHE_RAM_SIZE
- hex
- default 0x8000
- depends on BOARD_LIPPERT_ROADRUNNER_LX
-
config RAMBASE
hex
default 0x4000
diff --git a/src/mainboard/lippert/spacerunner-lx/Kconfig b/src/mainboard/lippert/spacerunner-lx/Kconfig
index 1043b0efbe..fcba6ada75 100644
--- a/src/mainboard/lippert/spacerunner-lx/Kconfig
+++ b/src/mainboard/lippert/spacerunner-lx/Kconfig
@@ -32,16 +32,6 @@ config IRQ_SLOT_COUNT
default 7
depends on BOARD_LIPPERT_SPACERUNNER_LX
-config DCACHE_RAM_BASE
- hex
- default 0xc8000
- depends on BOARD_LIPPERT_SPACERUNNER_LX
-
-config DCACHE_RAM_SIZE
- hex
- default 0x8000
- depends on BOARD_LIPPERT_SPACERUNNER_LX
-
config RAMBASE
hex
default 0x4000
diff --git a/src/mainboard/pcengines/alix1c/Kconfig b/src/mainboard/pcengines/alix1c/Kconfig
index 44281254b6..3e1237a47c 100644
--- a/src/mainboard/pcengines/alix1c/Kconfig
+++ b/src/mainboard/pcengines/alix1c/Kconfig
@@ -32,16 +32,6 @@ config IRQ_SLOT_COUNT
default 5
depends on BOARD_PCENGINES_ALIX1C
-config DCACHE_RAM_BASE
- hex
- default 0xc8000
- depends on BOARD_PCENGINES_ALIX1C
-
-config DCACHE_RAM_SIZE
- hex
- default 0x8000
- depends on BOARD_PCENGINES_ALIX1C
-
config RAMBASE
hex
default 0x4000