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| author | Patrick Georgi <patrick.georgi@secunet.com> | 2013-04-09 15:41:23 +0200 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-04-10 17:40:49 +0200 |
| commit | 1fde22c54cacb15493bbde8835ec9e20f1d39bf5 (patch) | |
| tree | c1ae3ed6d547ddda1759be3d6ef73f381701edbd /src | |
| parent | 7576f2515ed81a67e6271cb6a88fa94b626e2938 (diff) | |
| download | coreboot-1fde22c54cacb15493bbde8835ec9e20f1d39bf5.tar.xz | |
siemens/sitemp_g1p1: Make ACPI report the right mmconf region
ACPI reported the entire space between top-of-memory and some
(relatively) arbitrary limit as useful for MMIO. Unfortunately
the HyperTransport configuration disagreed. Make them match up.
Other boards are not affected since they don't report any region
for that purpose at all (it seems).
Change-Id: I432a679481fd1c271f14ecd6fe74f0b7a15a698e
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/3047
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/include/cpu/amd/amdk8_sysconf.h | 2 | ||||
| -rw-r--r-- | src/mainboard/siemens/sitemp_g1p1/dsdt.asl | 10 | ||||
| -rw-r--r-- | src/northbridge/amd/amdk8/acpi.c | 4 | ||||
| -rw-r--r-- | src/northbridge/amd/amdk8/northbridge.c | 3 |
4 files changed, 14 insertions, 5 deletions
diff --git a/src/include/cpu/amd/amdk8_sysconf.h b/src/include/cpu/amd/amdk8_sysconf.h index 3ae35fd17d..b367ac0e99 100644 --- a/src/include/cpu/amd/amdk8_sysconf.h +++ b/src/include/cpu/amd/amdk8_sysconf.h @@ -21,6 +21,8 @@ struct amdk8_sysconf_t { void *mb; // pointer for mb releated struct + unsigned mmconf_start; + unsigned mmconf_end; }; extern struct amdk8_sysconf_t sysconf; diff --git a/src/mainboard/siemens/sitemp_g1p1/dsdt.asl b/src/mainboard/siemens/sitemp_g1p1/dsdt.asl index 9d64e89943..a48a6de18d 100644 --- a/src/mainboard/siemens/sitemp_g1p1/dsdt.asl +++ b/src/mainboard/siemens/sitemp_g1p1/dsdt.asl @@ -255,8 +255,6 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "SIEMENS", "SITEMP ", 0x20101005) MPEN, 8 } - Name (IOLM,0xe0000000) - #include "acpi/platform.asl" Scope(\_SB) { @@ -385,6 +383,8 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "SIEMENS", "SITEMP ", 0x20101005) External (MMIO) External (TOM1) External (TOM2) + External (MMCB) /* MMConf Begin */ + External (MMCE) /* MMConf End */ Name(_HID, EISAID("PNP0A03")) Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ @@ -1186,9 +1186,9 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "SIEMENS", "SITEMP ", 0x20101005) CreateDWordField(CRES, ^EMM2._MAX, EM2E) CreateDWordField(CRES, ^EMM2._LEN, EM2L) - Store(TOM1, EM2B) - Subtract(IOLM, 1, EM2E) - Subtract(IOLM, TOM1, EM2L) + Store(MMCB, EM2B) + Subtract(MMCE, 1, EM2E) + Subtract(MMCE, MMCB, EM2L) If(LGreater(LOMH, 0xC0000)){ Store(0xC0000, EM1B) /* Hole above C0000 and below E0000 */ diff --git a/src/northbridge/amd/amdk8/acpi.c b/src/northbridge/amd/amdk8/acpi.c index 2eb39c07d1..0a6fbbadae 100644 --- a/src/northbridge/amd/amdk8/acpi.c +++ b/src/northbridge/amd/amdk8/acpi.c @@ -280,6 +280,10 @@ int k8acpi_write_vars(void) */ lens += acpigen_write_name_dword("TOM2", (msr.hi << 12) | msr.lo >> 20); + /* MMConf area for PCI0, begin and end */ + lens += acpigen_write_name_dword("MMCB", sysconf.mmconf_start); + lens += acpigen_write_name_dword("MMCE", sysconf.mmconf_end); + lens += k8acpi_write_HT(); //minus opcode acpigen_patch_len(lens - 1); diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index 5c1d97a1c6..d0d65ff290 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -561,6 +561,9 @@ static void amdk8_set_resources(device_t dev) amdk8_set_resource(dev, res, nodeid); } + sysconf.mmconf_start = mem_lowest_start; + sysconf.mmconf_end = mem_highest_end; + compact_resources(dev); for(bus = dev->link_list; bus; bus = bus->next) { |