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authorDuncan Laurie <dlaurie@chromium.org>2015-08-28 17:48:11 -0700
committerPatrick Georgi <pgeorgi@google.com>2015-09-08 11:31:58 +0000
commit2b9595a8722a92ea19d1ca51d975c4ba9a5fa11f (patch)
tree8cf7f92798436daf01cc22d4bc8ad952ec03c786 /src
parent5c44d2e23ec90eac5996aebbae214d3fe84b53ce (diff)
downloadcoreboot-2b9595a8722a92ea19d1ca51d975c4ba9a5fa11f.tar.xz
kunimitsu: Disable unused USB ports
Enable only the USB ports that are connected on-board or to an external port, all others will be disabled. BUG=chrome-os-partner:44662 BRANCH=none TEST=emerge-kunimitsu coreboot, change verified in schematic but not tested Change-Id: I909a6fab553bba829349dd08fa9cc3f26e5adeb2 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 1b0ce28d093e3b12273d7e0f56b47fb5b13d712f Original-Change-Id: I0c4b7de6e559595efa97d756e43f8398feccdffd Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/296036 Original-Commit-Ready: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11549 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/intel/kunimitsu/devicetree.cb12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb
index 6d0e2f4261..1c3cf67749 100644
--- a/src/mainboard/intel/kunimitsu/devicetree.cb
+++ b/src/mainboard/intel/kunimitsu/devicetree.cb
@@ -15,6 +15,18 @@ chip soc/intel/skylake
[PchSerialIoIndexUart2] = PchSerialIoPci, \
}"
+ register "PortUsb20Enable[0]" = "1" /* Type-C Port 1 */
+ register "PortUsb20Enable[1]" = "1" /* Type-C Port 2 */
+ register "PortUsb20Enable[2]" = "1" /* Bluetooth */
+ register "PortUsb20Enable[4]" = "1" /* Type-A Port (card) */
+ register "PortUsb20Enable[6]" = "1" /* Camera */
+ register "PortUsb20Enable[8]" = "1" /* Type-A Port (board) */
+
+ register "PortUsb30Enable[0]" = "1" /* Type-C Port 1 */
+ register "PortUsb30Enable[1]" = "1" /* Type-C Port 2 */
+ register "PortUsb30Enable[2]" = "1" /* Type-A Port (card) */
+ register "PortUsb30Enable[3]" = "1" /* Type-A Port (board) */
+
register "pirqa_routing" = "0x8b"
register "pirqb_routing" = "0x8a"
register "pirqc_routing" = "0x8b"