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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-07-15 02:30:49 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-07-15 01:56:09 +0200
commit2fa8cc35a8e65bfc9d1e1571069fc4d0bad83410 (patch)
treef2cfadf8a8f20fdc90ee4824f1f6c5c2a354a80a /src
parentdfad0708311758d6a9377b0390df0707f5fb4291 (diff)
downloadcoreboot-2fa8cc35a8e65bfc9d1e1571069fc4d0bad83410.tar.xz
AGESA hudson: Fix SPI writes
Only yangtze has longer FIFO in SPI controller. This was overlooked in commit 9f0a2be AMD SPI: Optimise for longer writes which broke SPI writes and caused CBFS errors with fam15tn. Change-Id: I821e3f1fa186d2383b30eab9c5d52797c2ef22c5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6273 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer@gmail.com>
Diffstat (limited to 'src')
-rw-r--r--src/southbridge/amd/agesa/hudson/Kconfig5
-rw-r--r--src/southbridge/amd/agesa/hudson/spi.c4
2 files changed, 4 insertions, 5 deletions
diff --git a/src/southbridge/amd/agesa/hudson/Kconfig b/src/southbridge/amd/agesa/hudson/Kconfig
index a0c68a323d..9652a8dcf8 100644
--- a/src/southbridge/amd/agesa/hudson/Kconfig
+++ b/src/southbridge/amd/agesa/hudson/Kconfig
@@ -224,11 +224,6 @@ config HUDSON_LEGACY_FREE
endif # SOUTHBRIDGE_AMD_AGESA_HUDSON || SOUTHBRIDGE_AMD_AGESA_YANGTZE
if SOUTHBRIDGE_AMD_AGESA_YANGTZE
- config AMD_SB_SPI_TX_LEN
- int
- default 64
- depends on SPI_FLASH
-
config AZ_PIN
hex
default 0xaa
diff --git a/src/southbridge/amd/agesa/hudson/spi.c b/src/southbridge/amd/agesa/hudson/spi.c
index 2aeb2c04c0..bbf6dd3ee2 100644
--- a/src/southbridge/amd/agesa/hudson/spi.c
+++ b/src/southbridge/amd/agesa/hudson/spi.c
@@ -43,7 +43,11 @@ static int bus_claimed = 0;
#define SPI_REG_CNTRL11 0xd
#define CNTRL11_FIFOPTR_MASK 0x07
+#if IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE)
#define AMD_SB_SPI_TX_LEN 64
+#else
+#define AMD_SB_SPI_TX_LEN 8
+#endif
static u32 spibar;