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authorPatrick Rudolph <patrick.rudolph@9elements.com>2019-05-08 12:44:15 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-05-13 09:28:11 +0000
commit59b4255c63b54739b9a095021508a13eab86c2a1 (patch)
tree03ef801ff13ff8559168bc157788aba26429eeb0 /src
parent44105942df5a396c5ff999d7dd8384bfd44784c0 (diff)
downloadcoreboot-59b4255c63b54739b9a095021508a13eab86c2a1.tar.xz
mb/samsung/lumpy: Move onboard SPD to second channel
Move the onboard SPD to second channel as native raminit does and workaround mrc expecations in northbridge code. Required to move pei data to devicetree and to use the same code for mrc and native raminit. Tested on Lenovo T520: Other fields then spd_data[0] are ignored. Change-Id: If1910e82a4bd178c2a6c2991c91e09782122888e Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32682 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/samsung/lumpy/romstage.c2
-rw-r--r--src/northbridge/intel/sandybridge/raminit_mrc.c13
2 files changed, 14 insertions, 1 deletions
diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c
index 26b9dcc813..a77149d927 100644
--- a/src/mainboard/samsung/lumpy/romstage.c
+++ b/src/mainboard/samsung/lumpy/romstage.c
@@ -197,7 +197,7 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
},
};
*pei_data = pei_data_template;
- memcpy(pei_data->spd_data[0], locate_spd(), 256);
+ memcpy(pei_data->spd_data[2], locate_spd(), 256);
}
const struct southbridge_usb_port mainboard_usb_ports[] = {
diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c
index ea3590f78d..1c9e021025 100644
--- a/src/northbridge/intel/sandybridge/raminit_mrc.c
+++ b/src/northbridge/intel/sandybridge/raminit_mrc.c
@@ -288,6 +288,19 @@ void perform_raminit(int s3resume)
mainboard_fill_pei_data(&pei_data);
post_code(0x3a);
+
+ /* Fix spd_data. MRC only uses spd_data[0] and ignores the other */
+ for (size_t i = 1; i < ARRAY_SIZE(pei_data.spd_data); i++) {
+ if (pei_data.spd_data[i][0] && !pei_data.spd_data[0][0]) {
+ memcpy(pei_data.spd_data[0], pei_data.spd_data[i],
+ sizeof(pei_data.spd_data[0]));
+ } else if (pei_data.spd_data[i][0] && pei_data.spd_data[0][0]) {
+ if (memcmp(pei_data.spd_data[i], pei_data.spd_data[0],
+ sizeof(pei_data.spd_data[0])) != 0)
+ die("Onboard SPDs must match each other");
+ }
+ }
+
pei_data.boot_mode = s3resume ? 2 : 0;
timestamp_add_now(TS_BEFORE_INITRAM);
sdram_initialize(&pei_data);