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authorTim Wawrzynczak <twawrzynczak@chromium.org>2020-08-17 14:16:24 -0600
committerTim Wawrzynczak <twawrzynczak@chromium.org>2020-08-19 18:02:40 +0000
commit6796f4b3cd55dadd3099e3af1ae225748487d06b (patch)
treeba6368e5dc043a70324ad1013051060ad27d56f9 /src
parent60752e724c13331d41d157fae68f495b6dc67844 (diff)
downloadcoreboot-6796f4b3cd55dadd3099e3af1ae225748487d06b.tar.xz
mb/google/volteer: Implement weak function `cse_board_reset`
Since Volteer also uses the CSE Lite SKU and the cr50, it is subject to a problem where old cr50 FW will not be able to properly detect an SoC reset, so the reset on cold boots caused by the CSE Lite RO->RW jump should instead get an assist from the EC, which can perform a full cold reset. BUG=b:162977697 TEST=Verify EC performs the cold reset Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: Ie8ae21c203da218459d5fd30a23be23520ed0598 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44536 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Caveh Jalali <caveh@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/volteer/mainboard.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mainboard/google/volteer/mainboard.c b/src/mainboard/google/volteer/mainboard.c
index 5317c11261..a926673ad7 100644
--- a/src/mainboard/google/volteer/mainboard.c
+++ b/src/mainboard/google/volteer/mainboard.c
@@ -6,10 +6,18 @@
#include <device/device.h>
#include <ec/ec.h>
#include <ec/google/chromeec/ec.h>
+#include <halt.h>
+#include <intelblocks/cse.h>
#include <soc/gpio.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <variant/gpio.h>
+void cse_board_reset(void)
+{
+ if (!google_chromeec_ap_reset())
+ halt();
+}
+
static void mainboard_init(struct device *dev)
{
mainboard_ec_init();