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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-01-23 15:59:38 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-02-11 20:40:42 +0000
commit8fd78a653f812b6bf8daf4cf3191f3d32ab1d5a8 (patch)
treeba5d8ea7348280fdb14d752cec115abcfe2826ec /src
parent06e33226b3cfd2c642f769440b7d1b5191c99d6b (diff)
downloadcoreboot-8fd78a653f812b6bf8daf4cf3191f3d32ab1d5a8.tar.xz
device/pci_ops: Move common pci_mmio_cfg.h
It is expected that method of accessing PCI configuration register space via memory-mapped region is arch-agnostic. Change-Id: Ide6baa00d611953aeb324be0d3561f464395c5eb Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31305 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/arch/x86/include/arch/io.h2
-rw-r--r--src/include/device/pci_mmio_cfg.h (renamed from src/arch/x86/include/arch/pci_mmio_cfg.h)2
2 files changed, 3 insertions, 1 deletions
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h
index 4b4a178110..a2ba776f81 100644
--- a/src/arch/x86/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
@@ -208,7 +208,7 @@ static __always_inline void write64(volatile void *addr,
#define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC))
#include <arch/pci_io_cfg.h>
-#include <arch/pci_mmio_cfg.h>
+#include <device/pci_mmio_cfg.h>
static __always_inline
uint8_t pci_read_config8(pci_devfn_t dev, unsigned int where)
diff --git a/src/arch/x86/include/arch/pci_mmio_cfg.h b/src/include/device/pci_mmio_cfg.h
index c660ed5332..2e2c19af48 100644
--- a/src/arch/x86/include/arch/pci_mmio_cfg.h
+++ b/src/include/device/pci_mmio_cfg.h
@@ -16,7 +16,9 @@
#ifndef _PCI_MMIO_CFG_H
#define _PCI_MMIO_CFG_H
+#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_type.h>
#define DEFAULT_PCIEXBAR CONFIG_MMCONF_BASE_ADDRESS