diff options
author | Yinghai Lu <yinghailu@gmail.com> | 2006-10-04 21:05:23 +0000 |
---|---|---|
committer | Yinghai Lu <yinghailu@gmail.com> | 2006-10-04 21:05:23 +0000 |
commit | 93a5a194c5863262ed9b9fabc4cd40efcf1fddd9 (patch) | |
tree | d8372ae88f00176f2b0a0d8bf27dfbc233482e71 /src | |
parent | 15b8ea74735044bf6cd88b178ce0468e027aca7c (diff) | |
download | coreboot-93a5a194c5863262ed9b9fabc4cd40efcf1fddd9.tar.xz |
failover_failover apc lds
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2438 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r-- | src/arch/i386/lib/failover_failover.lds | 2 | ||||
-rw-r--r-- | src/config/linuxbios_apc.ld | 100 |
2 files changed, 102 insertions, 0 deletions
diff --git a/src/arch/i386/lib/failover_failover.lds b/src/arch/i386/lib/failover_failover.lds new file mode 100644 index 0000000000..e042aa8cef --- /dev/null +++ b/src/arch/i386/lib/failover_failover.lds @@ -0,0 +1,2 @@ + __fallback_image = (CONFIG_ROM_STREAM_START & 0xfffffff0) - 8; + __normal_image = ((CONFIG_ROM_STREAM_START - FALLBACK_SIZE) & 0xfffffff0) - 8; diff --git a/src/config/linuxbios_apc.ld b/src/config/linuxbios_apc.ld new file mode 100644 index 0000000000..9bf1dac7e8 --- /dev/null +++ b/src/config/linuxbios_apc.ld @@ -0,0 +1,100 @@ +/* + * Memory map: + * + * DCACHE_RAM_BASE + * : data segment + * : bss segment + * : heap + * : stack + */ +/* + * Bootstrap code for the STPC Consumer + * Copyright (c) 1999 by Net Insight AB. All Rights Reserved. + */ + +/* + * Written by Johan Rydberg, based on work by Daniel Kahlin. + * Rewritten by Eric Biederman + * 2005.12 yhlu add linuxbios_ram cross the vga font buffer handling + * 2006.05 yhlu tailed it to use it for AP code in cache + */ +/* + * We use ELF as output format. So that we can + * debug the code in some form. + */ +INCLUDE ldoptions + +ENTRY(_start) + +SECTIONS +{ + . = DCACHE_RAM_BASE; + /* + * First we place the code and read only data (typically const declared). + * This get placed in rom. + */ + .text : { + _text = .; + *(.text); + *(.text.*); + . = ALIGN(16); + _etext = .; + } + .rodata : { + _rodata = .; + . = ALIGN(4); + *(.rodata) + *(.rodata.*) + . = ALIGN(4); + _erodata = .; + } + /* + * After the code we place initialized data (typically initialized + * global variables). This gets copied into ram by startup code. + * __data_start and __data_end shows where in ram this should be placed, + * whereas __data_loadstart and __data_loadend shows where in rom to + * copy from. + */ + .data : { + _data = .; + *(.data) + _edata = .; + } + /* + * bss does not contain data, it is just a space that should be zero + * initialized on startup. (typically uninitialized global variables) + * crt0.S fills between _bss and _ebss with zeroes. + */ + _bss = .; + .bss . : { + *(.bss) + *(.sbss) + *(COMMON) + } + _ebss = .; + _end = .; + . = ALIGN(0x1000); + _stack = .; + .stack . : { + . = 0x4000; + } + _estack = .; + _heap = .; + .heap . : { + . = ALIGN(4); + } + _eheap = .; + /* The ram segment + * This is all address of the memory resident copy of linuxBIOS. + */ + _ram_seg = _text; + _eram_seg = _eheap; + + _bogus = ASSERT( ( _eram_seg <= ((DCACHE_RAM_BASE + DCACHE_RAM_SIZE - DCACHE_RAM_GLOBAL_VAR_SIZE))) , "linuxbios_apc is too big"); + + /DISCARD/ : { + *(.comment) + *(.note) + *(.note.*) + } +} |